ASIC-in-the-loop methodology for verification of piecewise affine controllers

Abstract

Abstract-This paper exposes a hardware-in-the-loop methodology to verify the performance of a programmable and configurable application specific integrated circuit (ASIC) that implements piecewise affine (PWA) controllers. The ASIC inserted into a printed circuit board (PCB) is connected to a logic analyzer that generates the input patterns to the ASIC (in particular, the values to program the memories, configuration parameters, and values of the input signals). The output provided by the ASIC is also taken by the logic analyzer. A Matlab program controls the logic analyzer to verify the PWA controller implemented by the ASIC in open-loop as well as in closed-loop configurations.

Application specific integrated circuit solution for multi‐input multi‐output piecewise‐affine functions

“…The selected test package was JLCC68. Using the design methodology proposed in , the samples were tested for the different PWA forms, the number of input–output dimensions, and considering different operation conditions.…”