2006 IEEE Nuclear Science Symposium Conference Record 2006
DOI: 10.1109/nssmic.2006.355951
|View full text |Cite
|
Sign up to set email alerts
|

ASIC with Multiple Energy Discrimination for High-Rate Photon Counting Applications

Abstract: An ASIC for high rate photon counting measurements with multiple energy discrimination is presented. Optimized for pixelated CdZnTe sensors, the ASIC is composed of 64 channels with low-noise charge preamplification, high-order shaping (40ns minimum peaking time), and five window-discriminators with associated 16-bit counters. An efficient readout scheme allows simultaneous measurement and readout through a 60 MHz 16-bit output bus. The ASIC architecture and experimental results are reported, and the impact of… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
6
0

Year Published

2009
2009
2019
2019

Publication Types

Select...
5
1

Relationship

0
6

Authors

Journals

citations
Cited by 7 publications
(6 citation statements)
references
References 21 publications
0
6
0
Order By: Relevance
“…The stopping power exceeds that of both CdTe and CZT (see Figure 1) and 2 mm thickness is enough to stop virtually 100% of 70 keV and 87.9% of 140 keV X-ray photons. LYSO:Ce has a decay time of ~40 ns, and with a 5 th order shaping amplifier 95% of the light should be collected with a peaking time of ~140 ns [41,42], which would lead to a theoretical count rate capability of ~7 MHz. Taking into account SNR and Equivalent Noise Charge (ENC) this value would likely be reduced to ~1 MHz.…”
Section: Conceptual Design Of Scintillator-based Pcdmentioning
confidence: 99%
“…The stopping power exceeds that of both CdTe and CZT (see Figure 1) and 2 mm thickness is enough to stop virtually 100% of 70 keV and 87.9% of 140 keV X-ray photons. LYSO:Ce has a decay time of ~40 ns, and with a 5 th order shaping amplifier 95% of the light should be collected with a peaking time of ~140 ns [41,42], which would lead to a theoretical count rate capability of ~7 MHz. Taking into account SNR and Equivalent Noise Charge (ENC) this value would likely be reduced to ~1 MHz.…”
Section: Conceptual Design Of Scintillator-based Pcdmentioning
confidence: 99%
“…The HERMES4 ASIC, based upon 350-nm CMOS technology, offers 32 channels of low-noise charge amplification, high-order shaping with baseline stabilisation, and peak detection for various low-noise analogue/digital processing (Fig. 7(a)) [33,34]. For reducing stray capacitance and for suppressing signals stemming from electrical interconnections, each sensor segment in the array is wire-bonded directly to the input of the front-end readout channel (Fig.…”
Section: Readout Electronics and Peripheriesmentioning
confidence: 99%
“…Compared to AC coupling, the non-linear response of the BLH can minimize baseline shifting at high event-rates. Such a BLH was successfully implemented in several different application-specific integrated circuits (ASICs) [5]–[11]. …”
Section: Introductionmentioning
confidence: 99%