ATCA/AXIe compatible board for fast control and data acquisition in nuclear fusion experiments

Batista, A.J.N.; Leong, C.; Bexiga, V.; Rodrigues, A.P.; Combo, A.; Carvalho, B.B.; Fortunato, J.; Correia, M.; Teixeira, J.P.; Teixeira, I.C.; Sousa, J.; Gonçalves, Bruno; Varandas, C.A.F.

doi:10.1016/j.fusengdes.2012.05.005

Cited by 19 publications

(9 citation statements)

References 4 publications

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“…The shelf backplane provides several network topologies with possible redundancy schemes to be configured on the specified ATCA interfaces [6]. Logical slot numbers 1 and 2 are hub-dedicated slots, while the remaining (3)(4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(14) are node slots.…”

Section: Canddaq Overviewmentioning

confidence: 99%

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Precision Time Protocol support hardware for ATCA control and data acquisition system

Correia

Sousa

Carvalho

et al. 2015

Fusion Engineering and Design

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h i g h l i g h t s• ATCA based control and data acquisition subsystem has been developed at IPFN.• PTP and time stamping were implemented with VHDL and PTP daemon (PTPd) codes.• The RTM (. . .) provides PTP synchronization with an external GMC.• The main advantage is that timestamps are generated closer to the Physical Layer at the GMII.• IPFN's upgrade consistently exhibited jitter values below 25 ns RMS. a r t i c l e i n f o . The TCN infrastructure was tested for an RMS jitter under the limit of 50 ns. Therefore, IPFN's hardware, namely the ATCA-PTSW-AMC4 hub-module, which is in charge of timing and synchronization distribution for all subsystem endpoints, shall also perform within this jitter limit. This paper describes a relevant upgrade, applied to the ATCA-PTSW-AMC4 hardware, to comply with these requirements -in particular, the integration of an add-on module "RMC-TMG-1588" on its Rear Transition Module (RTM). This add-on is based on a commercial FPGA-based module from Trenz Electronic, using the ZHAW "PTP VHDL code for timestamping unit and clock", which features clock offset and drift correction and hardware-assisted time stamping. The main advantage is that timestamps are generated closer to the Physical Layer, at the Gigabit Ethernet Media Independent Interface (GMII), avoiding the timing uncertainties accumulated through the upper layers. PTP code and user software run in a MicroBlaze TM soft-core CPU with Linux in the same FPGA, adding programmability and quick implementation of the desired features and upgrades. The paper briefly presents an overview of the ATCA C&DAQ, presenting the PTP and time stamping solution and how it was hardware-implemented, resulting in the RMC-TMG-1588 module. Finally it will describe the synchronization performance tests and results obtained at ITER site as well as indicating further developments to the system, in order to fulfil ITER's requirements.

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Section: Canddaq Overviewmentioning

confidence: 99%

“…The current application uses digitizing units ATCA-IO-PROCESSOR [7] on slots 3 and 5 and a PCI express (PCIe) and timing switch ATCA-PTSW-AMC4 [8] which handles the digitizers' data and timing signals. These in-house developed hardware components belong to the "ITER Catalogue of I&C Products" [9].…”

Section: Canddaq Overviewmentioning

confidence: 99%

Precision Time Protocol support hardware for ATCA control and data acquisition system

Correia

Sousa

Carvalho

et al. 2015

Fusion Engineering and Design

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“…The system is based on in-house developed instrumentation modules: ATCA-IO-PROCESSOR are PCIe endpoint digitizing units [6], while the ATCA-PTSW-AMC4 are PCIe data hubs, which handle data from the node-endpoints and interface with an external host [6]. Several arrangements of these boards can populate the ATCA shelf in order to establish star/dual-star PCIe networks.…”

Section: System Architecturementioning

confidence: 99%

Development of high-availability ATCA/PCIe data acquisition instrumentation

Correia

Sousa

Batista

et al. 2015

2015 4th International Conference on Advancements in Nuclear Instrumentation Measurement Methods and Their Applications (ANIMMA

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Latest Fusion energy experiments envision a quasicontinuous operation regime. In consequence, the largest experimental devices, currently in development, specify highavailability (HA) requirements for the whole plant infrastructure. HA features enable the whole facility to perform seamlessly in the case of failure of any of its components, coping with the increasing duration of plasma discharges (steady-state) and assuring safety of equipment, people, environment and investment. IPFN developed a control and data acquisition system, aiming for fast control of advanced Fusion devices, which is thus required to provide such HA features. The system is based on in-house developed Advanced Telecommunication Computing Architecture (ATCA) instrumentation modules -IO blades and data switch blades, establishing a PCIe network on the ATCA shelf's backplane. The data switch communicates to an external host computer through a PCIe data network. At the hardware management level, the system architecture takes advantage of ATCA native redundancy and "hot swap specifications to implement fail-over substitution of IO or data switch blades. A redundant host scheme is also supported by the ATCA/PCIe platform. At the software level, PCIe provides implementation of hot plug services, which translate the hardware changes to the corresponding software/operating system devices. The paper presents how the ATCA and PCIe based system can be setup to perform with the desired degree of HA, thus being suitable for advanced Fusion control and data acquisition systems.

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“…A set of prototypes (Front Board and RTM) are being tested in ATCA shelves, in the hub positions/slots, along with compliant node I/O blades [4], to where the PCIe data (fabric interface) and timing signals (clock and synchronization interface) are distributed. So far, the PCIe switching and clock distribution tests were successful.…”

Section: Project Statusmentioning

confidence: 99%

Timing distribution and synchronization of an ATCA fast controller for fusion devices

Correia¹,

Sousa²,

Carvalho³

et al. 2012

2012 18th IEEE-NPSS Real Time Conference

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An ATCA-based fast plant system controller was developed by IPFN to meet ITER's requirements. Timing synchronization and distribution for all hardware units in the ATCA shelf is implemented on a PCIe-based, AMC quad-carrier module that includes a timing switch. This hardware architecture allows for AMC COTS products to be rapidly integrated into the system, resulting in innumerous possibilities for PCIe host and ATCA/AMC clock source locations. For this purpose, timing distribution and synchronization is fully programmable. Each ATCA/AMC clock may originate from any physical location, to be distributed elsewhere within the ATCA shelf. This is achieved via firmware, implemented in a Virtex-6 Field Programmable Gate Array (FPGA). Firmware will also include IEEE-1588-2008 and White Rabbit over Ethernet support.

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ATCA/AXIe compatible board for fast control and data acquisition in nuclear fusion experiments

Cited by 19 publications

References 4 publications

Precision Time Protocol support hardware for ATCA control and data acquisition system

Precision Time Protocol support hardware for ATCA control and data acquisition system

Development of high-availability ATCA/PCIe data acquisition instrumentation

Timing distribution and synchronization of an ATCA fast controller for fusion devices

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