Aurochs: An Architecture for Dataflow Threads

Vilim, Matthew; Rucker, Alexander; Olukotun, Kunle

doi:10.1109/isca52012.2021.00039

Cited by 13 publications

(2 citation statements)

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“…Chronos [6] is a framework to build task-parallel accelerators for applications with speculative parallelism. Three recent works address flexible parallelism for reconfigurable accelerators: Aurochs [61] proposes a threading model for reconfigurable dataflow architectures. PolyGraph [18] similarly adds an integrated task/dataflow model for a reconfigurable accelerator.…”

Section: Discussionmentioning

confidence: 99%

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TaskStream: accelerating task-parallel workloads by recovering program structure

Dadu

Nowatzki

2022

Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

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Reconfigurable accelerators, like CGRAs and dataflow architectures, have come to prominence for addressing data-processing problems. However, they are largely limited to workloads with regular parallelism, precluding their applicability to prevalent task-parallel workloads. Reconfigurable architectures and task parallelism seem to be at odds, as the former requires repetitive and simple program structure, and the latter breaks program structure to create small, individually scheduled program units.Our insight is that if tasks and their potential for communication structure are first-class primitives in the hardware, it is possible to recover program structure with extremely low overhead. We propose a task execution model for accelerators called TaskStream, which annotates task dependences with information sufficient to recover inter-task structure. TaskStream enables work-aware load balancing, recovery of pipelined inter-task dependences, and recovery of inter-task read sharing through multicasting.We apply TaskStream to a reconfigurable dataflow architecture, creating a seamless hierarchical dataflow model for task-parallel workloads. We compare our accelerator, Delta, with an equivalent static-parallel design. Overall, we find that our execution model can improve performance by 2.2× with only 3.6% area overhead, while alleviating the programming burden of managing task distribution. CCS CONCEPTS• Computer systems organization → Reconfigurable computing; Data flow architectures; Heterogeneous (hybrid) systems.

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Section: Discussionmentioning

confidence: 99%

“…ParallelXL [14] High Memory Centaur [42] High Explicit Plasticine* [45] Restricted Read-reuse Explicit PolyGraph [18] Restricted Near-data Memory Aurochs [61] High Memory Fifer [38] Restricted Near-data Memory Delta (ours) Medium Read-reuse Explicit * Uses traditional threads for parallelism; no hardware support for tasks.…”

Section: Reconfigurable Acceleratorsmentioning

confidence: 99%