Automated Power Characterization for Run-Time Power Emulation of SoC Designs

Bachmann, Christian; Genser, Andreas; Steger, Christian; Weiß, Reinhold; Haid, Josef

doi:10.1109/dsd.2010.38

Cited by 27 publications

(12 citation statements)

References 12 publications

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“…11. Test system augmented by power emulation unit (Bachmann et al, 2010b) enable power awareness at early development stages. Furthermore, these approaches aid designers in developing more power-and energy-efficient systems while reducing overall development times.…”

Section: Discussionmentioning

confidence: 99%

Power-aware hardware/software codesign of mobile devices

Steger

Bachmann

Genser

et al. 2010

Elektrotech. Inftech.

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Power-aware hardware/software codesign defines a design methodology for the development of energy efficient embedded systems. With the appearance of energy-harvesting devices or RF-powered smart cards in recent years, the focus of the design process has been shifting from purely energy-oriented to power-constraints-oriented optimization strategies.In this paper we present an overview of various codesign flows and we motivate the importance of power awareness in today's design processes. Moreover, the industrial relevance of hardware/software codesign is shown in a case study of an RF-powered smart card system. Keywords: power awareness; hardware/software codesign; smart cards; power emulation Power-aware Hardware/Software Codesign fü r mobile Systeme.Power-aware Hardware/Software Codesign definiert eine Design-Methode fü r die Entwicklung energieeffizienter, eingebetteter Systeme. Durch das verstä rkte Aufkommen von Gerä ten, die ihre Energie aus der Umgebung beziehen ("Energy Harvesting") oder kontaktlos ü ber ein RF-Feld versorgt werden, hat sich auch der Fokus des Designprozesses verlagert. Statt sich ausschließlich auf die Energieoptimierung zu konzentrieren, mü ssen nun auch immer stä rker Einschrä nkungen bezü glich der Leistungsaufnahme berü cksichtigt werden.In diesem Artikel werden verschiedene Codesign-Flows vorgestellt und deren Bedeutung in der Entwicklung von leistungs-und energieeffizienten Systemen unterstrichen. Darü ber hinaus wird die industrielle Relevanz des Hardware/Software Codesigns anhand eines konkreten Anwendungsfalls in der Anwendungsdomä ne von kontaktlosen Chipkarten gezeigt.

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Section: Discussionmentioning

confidence: 99%

Power-aware hardware/software codesign of mobile devices

Steger

Bachmann

Genser

et al. 2010

Elektrotech. Inftech.

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“…Recent methods have focused on partial or complete automation of the modelling [3], [4], [5]. Ideally, a user would only need to input an HDL design to the method in order to synthesize a version augmented with a model of the per-cycle energy consumption.…”

Section: B Energy Model Synthesis Methodsmentioning

confidence: 99%

“…Bachmann et al present a semi-automatic method for creating a model for an entire hardware design [4]. The method uses single-bit signals as predictors, selected based on a manually created name pattern list.…”

Section: B Energy Model Synthesis Methodsmentioning

confidence: 99%

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A Systematic Approach to Automated Construction of Power Emulation Models

Bjørnseth

Djupdal

Natvig

2016

Proceedings of the 2016 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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Abstract-Efficient estimation of power consumption is vital when designing large digital systems. The technique called power emulation can speed up estimation by implementing power models alongside a design on an FPGA. Current state-of-theart power emulation methods construct models using various custom techniques, but there is no study on how the existing methods relate to each other nor how their differences impact the final quality of the model. We propose a methodology which describes the breadth of current approaches to automated construction of power emulation models. We also evaluate the current methods, finding that there is significant variation in accuracy and complexity. In 32.8 % of all tests, the average accuracy of the least complex method is better than that of the most advanced method at less than 0.3 % the hardware overhead. This result fuels the hope that further innovation may yield models with high accuracy at low implementation cost. Our software frameworks and experimental data are made available to promote continued work on the field.

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“…The authors characterized the power consumption behavior of a specific target, the RTOS realtime operating system, and measured the real consumption of the system. In [8], [9], complete power characterization flows including estimation errors for different benchmark applications are shown. Their results directly show the high accuracy differences between several typical embedded system applications.…”

Section: B Power and Fault Injection Modelingmentioning

confidence: 99%

Hardware-Accelerated Workload Characterization for Power Modeling and Fault Injection

Krieg

Grinschgl

Steger

et al. 2012

2012 IEEE 21st Asian Test Symposium

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During recent years the increasing introduction of system functionality into integrated devices resulted into several new problems for chip designers. First, high system-on-chip complexity combined with increased clock frequencies leads to power budget and thermal issues. Second, small semiconductor process structures are more sensitive to faults resulting from logic degradation and external radiation sources. Early testing and evaluation of hardware and software implementations have been enabled in the last years using hardware-accelerated emulation techniques. Such implementations rely on functional models of the target system, generated using specialized benchmark suites. These have been designed to accurately resemble typical application scenarios of the target implementation. Unfortunately, power and fault injection emulation accuracy is depending on a good coverage of the system's logic, which is not guaranteed by typical benchmarks. Therefore, this paper proposes an exhaustive hardware accelerated methodology for the evaluation of such applications and generation of accurate emulation models. The behavior of standard benchmarks are investigated using an open available system-on-chip platform based case study.

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Automated Power Characterization for Run-Time Power Emulation of SoC Designs

Cited by 27 publications

References 12 publications

Power-aware hardware/software codesign of mobile devices

Power-aware hardware/software codesign of mobile devices

A Systematic Approach to Automated Construction of Power Emulation Models

Hardware-Accelerated Workload Characterization for Power Modeling and Fault Injection

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