Automatic frequency detection circuit for first intermediate frequency of DRM/DAB receivers

Abstract

This paper presents skills to reduce the detection time and assure the frequency grid of the automatic frequency detector circuit in a DRM/DAB receiver. To support minimum receiver requirements for DRM "Draft Version 1.21", we introduce an automatic frequency detector (AFD) technique for the low-IF receiver, which uses a new detect algorithm to improve detector speed. The simulation results show that the detect time and the frequency grid meet the requirements of DRM "Draft Version 1.21". The AFD circuit is designed with SMIC 0.18 Pm RF CMOS process. Post-simulation results show that the minimum detection time is 1.748 ms. It consumes 0.64 mW under a 1.8 V supply. The core area is 0.15u0.18 mm 2 .