Avionics Full-duplex switched Ethernet (AFDX): Modeling and simulation

Safwat, Nour El-Din; Zekry, Abdelhalim; Abouelatta, Mohamed

doi:10.1109/nrsc.2015.7117841

Cited by 8 publications

(3 citation statements)

References 3 publications

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“…In [42], the authors proposed a modular simulator for switched Ethernet networks called SEtSim and developed using Simulink. Furthermore, an AFDX implementation based on the TTEthernet [5] model on OMNeT++ is described in [38] and another implementation in OPNET is presented in [39] and [40]. Likewise, the authors in [41] did a study of the results obtain of simulating AFDX networks using OPNET.…”

Section: Related Workmentioning

confidence: 99%

Verification and Validation Framework for AFDX Avionics Networks

Villegas

Fortes

Escano³

et al. 2022

IEEE Access

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Aircrafts fully rely in a wide variety of electronic systems: sensors, navigation equipment, representation screens and communication elements. The interconnection of these avionics implies a huge challenge for the aircraft communication networks. Extremely stringent requirements in terms of reliability and predictability have to be provided for a safe operation. There are also important limitations to recreate those networks in a prototype form, due to the costs of the related equipment and the interest of testing different architectures and possible configurations dynamically. Moreover, performance estimation approaches based solely on network calculus provide limits for worst-case scenarios, without generating a detailed feedback under different circumstances and configurations of the network and different data sources. In this context, the present work proposes and develops an evaluation framework for avionics networks in order to support the verification and validation (V&V) procedures of the communication system before applying for certification. The proposed framework implements an event-based simulator in Simulink for Avionics Full-Duplex Switched Ethernet (AFDX), one of the most extended data protocols for avionics. This is evaluated in comparison with network calculus and bibliography performance estimation approaches, demonstrating its accuracy and capabilities.

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Section: Related Workmentioning

confidence: 99%

Verification and Validation Framework for AFDX Avionics Networks

Villegas

Fortes

Escano³

et al. 2022

IEEE Access

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“…Up to now, several approaches have been introduced for calculating end-to-end delays in an AFDX network, including a simulation approach [31,32], response time analysis [33,34], network calculus [35,36], trajectory approach [37], forward end-to-end delays analysis [38,39], and model checking approach [40][41][42]. Although the model checking approach can obtain more exact results than the rest that compute the upper bounds of worst-case end-to-end delays, it is confronted with the state space explosion problem for realistic networks [41].…”

Section: Related Work and Contributionsmentioning

confidence: 99%

Schedulability Analysis of Distributed Multicore Avionics Systems with UPPAAL

Han

Zhai

Nielsen

et al. 2019

Journal of Aerospace Information Systems

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This paper presents an approach for schedulability analysis of Distributed Integrated Modular Avionics (DIMA) systems that consist of spatially distributed ARINC-653 multicore modules connected by a unified Avionics Full-Duplex Switched Ethernet (AFDX) network. A multicore DIMA system is modeled as a set of stopwatch automata in UPPAAL to verify its schedulability by model checking. However, direct verification is infeasible due to the large state space. Therefore, global analysis based on statistical model checking (SMC) and compositional analysis based on classical model checking are combined, thereby mitigating the state space explosion problem. Even though the nature of SMC testing cannot prove schedulability, the model of a DIMA system first undergoes quick schedulability falsification using global SMC analysis. Thereafter, a compositional approach is used to check each partition, including its communication environment individually. By using assume-guarantee reasoning, it is ensured that each real-time task meets the deadline and that communication constraints are also fulfilled globally. The approach is finally applied to the schedulability analysis of a concrete multicore DIMA system.

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“…Avionics Full Duplex Switched Ethernet (AFDX) is a trademark of Airbus and a specific implementation of ARINC (Aeronautical Radio, Inc.) Specification 664 Part 7. AFDX is a deterministic network based on the same hardware as Ethernet (IEEE 802.3) [1]. Airbus developed this network to reduce weight on the planes and to provide a guaranteed bandwidth and Quality of Service (QoS).…”

Section: Introductionmentioning

confidence: 99%

Implementation of an AFDX Interface with Zynq SoC Board in FPGA

Molina

Corral

Aljaro

et al. 2020

ELEKTRON ELEKTROTECH

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This work is based on the Hardware development of the Transmission part for the communication inside the satellite. Our goal is move as much as possible of the software part into the Field-programmable gate array (FPGA) matrix due to the single event upsets (SEU). This project is part of the collaborative project called “Mission: NET@SPACE”. It was chosen by the European Commission under the Seventh Framework Program for Research (FP7) to develop an Avionics Full Duplex Switched Ethernet (AFDX) demonstrator based in FPGA. It has to be able to receive and transmit frames and enhance the robustness. The scheduling of the protocol should also be moved into the hardware, by still keeping a small footprint of the whole design. In this paper, we introduce the theory and used technologies, the project flow and development, including the decisions and milestones, to arrive at the end to the further possibilities and conclusions.

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Avionics Full-duplex switched Ethernet (AFDX): Modeling and simulation

Cited by 8 publications

References 3 publications

Verification and Validation Framework for AFDX Avionics Networks

Verification and Validation Framework for AFDX Avionics Networks

Schedulability Analysis of Distributed Multicore Avionics Systems with UPPAAL

Implementation of an AFDX Interface with Zynq SoC Board in FPGA

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