2022
DOI: 10.1109/lmwc.2022.3178916
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-Band Class-B VCO in 22 nm FD-SOI With Inductive Source Degeneration of the Tail Current Source

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Cited by 6 publications
(3 citation statements)
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“…A pair of varactors are used to fine-tune frequency, and a 4-bit binary-weighted switched capacitor bank is used to coarse-tune frequency. As the key block of the PLL system, the VCO phase noise dominates the PLL out-of-band phase noise performance [22,23,24], an inductor Ltail is introduced at the tail of the VCO to improve the VCO phase noise. The inductor Ltail and parasitic capacitance CP of MOSFETs resonate at the second harmonic of the oscillation frequency and provide a high impedance at the commonmode path, the high impedance can prevent the tank Qfactor from deteriorating.…”
Section: Vco Designmentioning
confidence: 99%
“…A pair of varactors are used to fine-tune frequency, and a 4-bit binary-weighted switched capacitor bank is used to coarse-tune frequency. As the key block of the PLL system, the VCO phase noise dominates the PLL out-of-band phase noise performance [22,23,24], an inductor Ltail is introduced at the tail of the VCO to improve the VCO phase noise. The inductor Ltail and parasitic capacitance CP of MOSFETs resonate at the second harmonic of the oscillation frequency and provide a high impedance at the commonmode path, the high impedance can prevent the tank Qfactor from deteriorating.…”
Section: Vco Designmentioning
confidence: 99%
“…Inductive source degeneration is used for the tail current source in a novel Class-B VCO operating in the K-band. As a result, the VCO's core size is decreased, and a compact, low-Q tail filtering inductor can be used at millimeter-wave frequencies [192].…”
Section: Class-b C D E F and Colpitts Lcvco 1) Class-b Lcvcomentioning
confidence: 99%
“…This method implements inductor LH and capacitor CH between the negative gm and AC ground. The LC tank suppresses even harmonics with high impedance to the second harmonic frequency [10], [11], [12], [29], [36], [44], [49]. As the LC configuration of the tail, the node touching the negative gm falls to a voltage lower than the ground and secures the VDS of the core MOSFET, increasing the output power of the VCO.…”
Section: Introductionmentioning
confidence: 99%