Band-Edge Work Function Obtained by Plasma Doping TiN Metal Gate for nMOS Device Application

Xu, Qing; Zou, Wei; Xu, Gaobo; Tang, Shan; Tao, Guilong; Salimian, S.; Liu, Jinbiao; Liang, Qi; Wang, Yao; Xiang, Jinjuan; Wang, Xiaolei; Zhu, Huilong; Li, Junfeng; Zhao, Chao; Raj, Deven; Maynard, Helen; Chen, Dapeng; Ye, Tianchun

doi:10.1109/ted.2018.2823337

Cited by 5 publications

(3 citation statements)

References 14 publications

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“…27 To balance the charge neutrality, the electrons are transferred from high V o energy level to the lower E F of metal gate, resulting in the rising of E F and decreasing of EWF and V FB for the HK surface case. Without the effective oxygen scavenging source including Ti or metal-doped TiN stack, [28][29][30] the additional oxygen is preferred the movement toward SiO 2 and Si interface to form the stable Si-O-Si bond in Fig. 9b.…”

Section: Resultsmentioning

confidence: 99%

Multi-Vt Performance Dependence on Capping Layer Position by NPT for PMOS Device Applications

Yao

2019

ECS J. Solid State Sci. Technol.

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In this paper, we present the comprehensive investigation of multi-Vt performance dependence on ALD-TiN capping layer position by NPT (nitrogen plasma treatment) process. The basic performance of fabricated PMOSCAPs are strongly dependent on the capping layer position by NPT process. 1) Flat-band voltage (VFB) negative shift is suppressed by increasing capping layer thickness before NPT process and EWF is toward band edge for the low power PMOS application, compared to the direct NPT at high-k surface. 2) Without capping layer shielding, the direct NPT process at HfO2 (high-k) surface brings out the oxygen vacancy generation and metal gate fermi level pinning and EWF toward band center for high performance PMOS application, while the capping layer can shield the nitrogen plasma with improvement of equivalent oxide thickness (EOT) and bulk trap density (Not). 3) The interface trap density (Dit) by conductance method is found to be significantly reduced by 35% compared to NPT process applied at capping layer top position. 4) The unique charge neutrality and oxygen vacancy model incorporating with capping layer shielding is reasonably proposed and successfully explains the above multi-Vt performance dependence on NPT position. The investigation of multi-Vt performance on capping layer position dependence by NPT will encourage the process improvement and advance HKMG technology for PMOS device multi-applications.

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Section: Resultsmentioning

confidence: 99%

Multi-Vt Performance Dependence on Capping Layer Position by NPT for PMOS Device Applications

Yao

2019

ECS J. Solid State Sci. Technol.

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“…Therefore, this technology is widely used to manufacture ultra-shallow junctions [15], silicon-oninsulator (SOI) structures [16], flat panel displays [17], image sensors [18], and power semiconductor devices [19]. It can also be applied to various semiconductor processes and device fabrication steps, such as trench doping [20,21] and metallization [22][23][24]. On the other hand, the plasma doping process is relatively complicated and very sensitive to the plasma environment.…”

Section: Introductionmentioning

confidence: 99%

Development of a Real-Time Boron Concentration Monitoring Technique for Plasma Doping Implantation

Chai,

Choa

2023

Crystals

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Plasma doping (PLAD) technology is widely used in the semiconductor industry. One of the problems associated with PLAD is precise dosage control and monitoring during the doping process. Excessive boron doping into the n-type poly gate will affect the p-MOSFET threshold voltage. In this study, we develop a novel method for the real-time monitoring of the boron concentration as it penetrates into an oxide film. We attempted to determine whether the real-time monitoring of the boron concentration can be replaced by measuring the thickness of the damaged layer remaining after plasma doping and a cleaning process, since the thickness of the damaged layer can be measured relatively easily in real time by means of ellipsometry. It is found that as the plasma doping energy is increased, the boron concentration increases linearly, with a strong correlation (R2 = 0.98) between the plasma doping energy and the boron concentration. Moreover, there is a close relationship between the plasma doping energy and the thickness of the damaged layer. As the doping energy is increased, the thickness of the damaged layer also increases linearly. We also find a close correlation (R2 = 0.92) between the change in the thickness of the damaged layer and the p-MOSFET threshold voltage. In summary, there are very good correlations between the plasma doping energy and the concentration of boron, the doping energy and the thickness of the damaged layer, and the thickness of the damaged layer and the threshold voltage. It is proven that the concentration of boron penetrating into the oxide layer can be monitored by measuring the thickness of the damaged layer in real time.

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“…5 Moreover, with the physical gate length shrinking less than 18 nm for 5 nm technology node and beyond, the serious issues of the sufficient space for complex gate stacks are eager to be addressed out. Therefore, novel techniques are proposed to enable a simplified process flow and effective modulation capability, including high-k metal gate doping, [6][7][8][9] and dipole formation. 10 The general strategy to realize multi-V T is focusing on gate laminated stacks, which is generally utilized as dual-work function metal stacks.…”

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confidence: 99%

Novel Band-Edge Work Function Performance Modulation via NPT with PMOS^1st/NMOS^1st Laminated Stack for PMOS Low Power Target

Yao¹,

Wu²,

Tian³

2020

ECS J. Solid State Sci. Technol.

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In this paper, the band-edge work function performance is systematically investigated and modulated via novel nitrogen plasma treatment (NPT) with the advanced PMOS 1st (TiN/TiN/TiAlC) and NMOS 1st (TiN/TiN) laminated stacks for the fabricated PMOS capacitors. The basic multi-V T performance is strongly modulated by controlling NPT process. 1) Flatband voltage (V FB ) shifts towards band edge are obtained as +120 mV (undiluted), +430 mV (diluted) for PMOS 1st and +80 mV (undiluted), +210 mV (diluted) for NMOS 1st . 2) By manipulating the NPT process from undiluted and diluted case, it can provide significant high bandedge effective work function ranging from 4.89 eV (undiluted) to 5.21 eV (diluted) for PMOS 1st and 5.22 eV (undiluted) to 5.35 eV (diluted) for NMOS 1st laminated stack, respectively. 3) NPT diluted with hydrogen is observed to maintain ultralow bulk trap density (1.11 × 10 11 cm −2 for PMOS 1st and nearly zero for NMOS 1st ) and interface trap density (3.34 × 10 11 eV −1 cm −2 for PMOS 1st and 6.45 × 10 11 eV −1 cm −2 for NMOS 1st ). The significant band-edge work function modulation and very low bulk and interface trap density demonstrate the novel NPT with PMOS 1st /NMOS 1st laminated stack is very promising to achieve the target of PMOS low-power application in the further technology node.

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Band-Edge Work Function Obtained by Plasma Doping TiN Metal Gate for nMOS Device Application

Cited by 5 publications

References 14 publications

Multi-Vt Performance Dependence on Capping Layer Position by NPT for PMOS Device Applications

Multi-Vt Performance Dependence on Capping Layer Position by NPT for PMOS Device Applications

Development of a Real-Time Boron Concentration Monitoring Technique for Plasma Doping Implantation

Novel Band-Edge Work Function Performance Modulation via NPT with PMOS^1st/NMOS^1st Laminated Stack for PMOS Low Power Target

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Band-Edge Work Function Obtained by Plasma Doping TiN Metal Gate for nMOS Device Application

Cited by 5 publications

References 14 publications

Multi-Vt Performance Dependence on Capping Layer Position by NPT for PMOS Device Applications

Multi-Vt Performance Dependence on Capping Layer Position by NPT for PMOS Device Applications

Development of a Real-Time Boron Concentration Monitoring Technique for Plasma Doping Implantation

Novel Band-Edge Work Function Performance Modulation via NPT with PMOS1st/NMOS1st Laminated Stack for PMOS Low Power Target

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Product

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Novel Band-Edge Work Function Performance Modulation via NPT with PMOS^1st/NMOS^1st Laminated Stack for PMOS Low Power Target