Band-pass continuous-time delta-sigma modulators employing LWR resonators

2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)

2013

Self Cite

Print ISBN : 978-1-4799-0618-5International audienceIn the context in the ENIAC ARTEMOS project for the design of agile radio front ends, this paper shows a methodology for the design of agile bandpass continuous-time delta sigma based on acoustic tunable resonators. These resonators use BST materials which have the property to be tunable by an external voltage, allowing changing the resonance frequency of filters by a few percent. Using such filters, the Oversampling ratio of delta sigma may decrease as the central frequency of the modulator may be adjusted precisely, allowing the change the band without having to acquire the whole spectrum. Direct RF applications at 2.4 GHz are expected within this project

Section: A Initial Discrete-time Transfer-functionmentioning

confidence: 99%

A design methodology for delta-sigma converters based on solid-state passive filters

2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)

2013

Self Cite

“…The model-extraction technique will be applied to the design of the sixth order CT Sigma-Delta modulator presented in [1]. The transistor-level implementation of the modulator was realized using the AMS 0.35µm BiCMOS technology.…”

Section: Differential Design Examplementioning

confidence: 99%

“…• Input and output entity ports with the established sense convention are used for all the input/output quantities: The sixth-order CT ΣΔ modulator considered is a 'pureresonator' architecture [1], working at a central frequency fc=0.25fs with an ADC sampling frequency fs=400MHz.…”

Section: Differential Design Examplementioning

confidence: 99%

“…The use of well-adapted technologies along with new processes like integrating CMOS circuits with micromechanical devices (e.g. Lamb Wave Resonators) offered the possibility to obtain very good bit resolutions for high levels of integration and low power consumption [1] [2]. Still, the conception effort requires very large computation times on transistor-level simulators; thus automatic optimization methods for an entire system are out of use.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architectures

2011 IEEE International Symposium of Circuits and Systems (ISCAS)

Tugui

2011

Self Cite

The design, simulation and optimization of complex continuous-time (CT) circuits like Sigma-Delta modulators require large computation times when using only transistor-level analog simulators like CADENCE Spectre or PSpice. Effective high-level system modeling should be considered in order to reduce the conception effort. However, the closed-loop architecture characteristics and technology requirements should be strictly observed on the respective models. In this work, we present a design methodology and the resulted application tools implying the extraction of CADENCE schematics for analog elements into robust macro-models for MATLAB-SIMULINK and VHDL-AMS. Upon designer's choice, the resulted macromodels can be used to implement and optimize a whole modulator in the SIMULINK object-oriented environment or the code-based analog VHDL process. Using the proposed methodology, fast simulations of a sixth-order CT Sigma-Delta modulator have been performed. I.

“…The methodology will be applied to the design of the first stage of a sixth order CT Sigma-Delta modulator. The architecture of this modulator was published in [7]. As shown in Figure 5, its filter consists of three transconductance amplifiers (Gm1-Gm3), four transimpedance amplifiers (Z1 to Z4), three multi-output current mirrors (M1 to M3) and Lamb Wave Resonator (LWR) filters.…”

Section: B Performed Analyses and Macro-models Extractionmentioning

confidence: 99%

A high-level modeling framework for the design and optimization of complex CT functions

2011 IEEE 9th International New Circuits and Systems Conference

Tugui

2011

Self Cite

Novel CMOS technologies are rapidly migrating towards the nanometer world. The design and optimization of complex analog circuits implying these processes is impracticable when using only transistor-level electronic design automation (EDA) tools. Efficient design methodologies including behavioral modeling are inevitable, but the high-level models should incorporate accurate circuit characteristics and technological limitations. One solution consists in using a refined top-down design process where the macro-models are extracted from the analog block elements (e.g. amplifiers, filters) implemented on specific technologies. These fast-simulating models can be used for the high-level simulation and optimization of the entire system. We propose in this paper a complete design methodology implying the above elements and the corresponding application framework based on the interface between MATLAB and CADENCE software tools. SIMULINK and VHDL-AMS are used for the high-level system modeling. A continuous-time (CT) Sigma-Delta modulator application is presented.