Bandwidth Enhancement of GaN MMIC Doherty Power Amplifiers Using Broadband Transformer-Based Load Modulation Network

Abstract

In this paper, we present a bandwidth enhancement technique for monolithic microwave integrated circuit (MMIC) Doherty power amplifiers (DPAs) in wireless transmitters. A broadband load modulation network is proposed by exploiting transformers and output-referred parasitic capacitances of the carrier and peaking transistors of DPA. The proposed network comprises two transformers that are used to improve frequency response of the load impedance presented to the carrier transistor at back-off and extend the DPA bandwidth. The network benefits from a unity transformation ratio and it can be readily realized by using edge-coupled microstrip transmission lines. Optimal coupling coefficients of the two transformers are determined based on bandwidth and insertion loss considerations. A proof-of-concept DPA is implemented in a 0.25-µm GaN MMIC process. It achieves 35-36 dBm output power, 42.8-48.7% drain efficiency at peak power and 24.4-31.6% at 6-dB back-off, over 4.5-6.0 GHz bandwidth. When excited by a 100-MHz 64-QAM signal with 8 dB peak-to-average power ratio (PAPR), the DPA exhibits 29.3 dBm average output power and 28.4% average drain efficiency, while the error vector magnitude (EVM) is −30.5 dB (3%) without any predistortion.

A Broadband Asymmetrical GaN MMIC Doherty Power Amplifier with Compact Size for 5G Communications

“…This work adopts a novel low ITR output topology to overcome the defect of narrow bandwidth in [15,17]. Moreover, this output topology and IIN for phase compensation can provide less power loss by reducing extra circuit components to achieve a higher efficiency at OPBO than DPA of [26].…”

“…The main amplifier is biased in class-AB with a gate voltage of −3.2 V and the auxiliary amplifier operates in class-C with a bias voltage of −5.4 V, that means the auxiliary amplifier will not work if the input power is not big enough. Different from other studies [26,28,29], in this design, the drain voltages of main and auxiliary amplifiers are different to ensure the same saturation current for good load modulation; they are 32 V and 28 V respectively, considering more power loss in the main branch.…”

“…However, one more branch means more power loss and larger size of circuit. Moreover, various methods are applied to improve the performance of DPA [23][24][25][26]. This presents a new bandwidth enhancement technique by exploiting transformers and output-referred parasitic capacitances of the carrier and peaking transistors of DPA to achieve a 1500 MHz bandwidth, from 4.5 GHz to 6.0 GHz.…”

GaN Integrated Circuit Power Amplifiers: Developments and Prospects

“…The most important issues include the parasitic capacitance and loss of transistors and passive components, large size of transmission lines for on-chip realization, the low gain of the class-C biased auxiliary transistor, and the need for asymmetric transistors for large PAPR signals [53]. A number of circuit architectures are developed for integrated circuit GaN Doherty PAs [54], [55], [56], [57], [58], [59].…”

Load‐modulation technique without using quarter‐wavelength transmission line

“…The main advantage of the Doherty power amplifier is the circuit simplicity, whereas its well-known disadvantage is the limitation of the bandwidth due to the impedance inverter [16]; much research has been pursued to improve the achievable bandwidth [17][18][19][20][21][22][23][24]. Improving the bandwidth of the Doherty amplifier involved analysing the impedance transformer in detail [17], absorbing the parasitic effects of the Doherty amplifier [18,19], or introducing a new post-matching network that can enhance the performance [25].…”