Battery-powered digital CMOS design

Pedram, Massoud; Wu, Qing

doi:10.1109/tvlsi.2002.801566

Cited by 41 publications

(19 citation statements)

References 12 publications

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“…where μ(i) is the battery efficiency factor [5]. To facilitate our future analysis, we define the instantaneous power consumption at time t as:…”

Section: B Nonlinear Battery Modelmentioning

confidence: 99%

“…In [5], two experiment-based formulas were provided to describe the relationship between the battery efficiency factor μ(i) and the discharge current i:…”

Section: B Nonlinear Battery Modelmentioning

confidence: 99%

“…A majority (see e.g., [2], [3], [4]) of work treat the batteries as being ideal and linear, by assuming that all the battery's capacity (stored energy) can be fully utilized. In fact, however, the battery models extracted from experiments show that the actual battery discharge is a nonlinear process [5], [6]. Compared with the conventional linear-battery-based designs, using those nonlinear battery models has the potential to significantly improve the system lifetime [7].…”

Section: Introductionmentioning

confidence: 99%

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Modulation Selection from a Battery Power Efficiency Perspective: A Case Study of PPM and OOK

Duan

Yang

et al. 2009

2009 IEEE Wireless Communications and Networking Conference

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Sensor nodes in wireless sensor networks (WSNs) are often expected to operate on batteries for a long period of time. Battery power efficiency (BPE) is therefore a critical factor dictating the lifetime of WSNs. In this paper, we aim to select the appropriate modulation scheme from a battery power efficiency perspective. Pulse position modulation (PPM) and on-off keying (OOK), as low-complexity pulse-based modulation schemes, are used for a case study of our methodology. The analysis is based on a general model that integrates typical WSN transmission and reception modules with a realistic nonlinear battery model. We first present the quantitative comparison results under general system design criteria. Then, we illustrate the comparisons with theoretical and numerical results under the bit error rate (BER) system design criterion.

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“…where μ(i) is the battery efficiency factor [5]. To facilitate our future analysis, we define the instantaneous power consumption at time t as:…”

Section: B Nonlinear Battery Modelmentioning

confidence: 99%

“…In [5], two experiment-based formulas were provided to describe the relationship between the battery efficiency factor μ(i) and the discharge current i:…”

Section: B Nonlinear Battery Modelmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Modulation Selection from a Battery Power Efficiency Perspective: A Case Study of PPM and OOK

Duan

Yang

et al. 2009

2009 IEEE Wireless Communications and Networking Conference

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“…However, the battery lifetime does not have a simple linear relationship with the power consumption of the system [9]. For instance, it is possible that a 2X increase in circuit power consumption leads a 3X reduction in the battery lifetime, compared with the 2X reduction in the ideal case [10]. As a result, it is not only the energy constraint but also the power constraint should be taken into account in the embedded system design.…”

Section: Motivationmentioning

confidence: 99%

Power-driven Real-time System Design with Energy Efficiency via ISA Customization

Jiang

Bian

Zhao

2007

2007 10th IEEE International Conference on Computer-Aided Design and Computer Graphics

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Compared with traditional fixed Instruction set architecture (ISA) processor, configurable processors can reduce the total number of execution cycles dramatically because the instruction set customization permits a much closer fit of the processor to target application. At the same time, custom instruction can also improve the energy efficiency remarkably. However, ISA customization does not always bring power efficiency Instead, sometimes it even increase the power consumption. To address this issue, this paper distinguishes energy efficiency from power efficiency via time granularity. Furthermore, a method combining ISA customization with frequency and voltage scaling is proposed to achieve both favorable energy and power efficiency.

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“…Furthermore, large current variation is usually correlated with large current spikes that can adversely affect chip temperature [Brooks and Martonosi 2001] to which chip reliability and subthreshold leakage power are exponentially related [Dhodapkar et al 2000]. Besides, maximum battery life is attained when the variance of the discharge current distribution is minimized [Pedram and Wu 2002]. Battery efficiency may change by as much as 25%; depending on the discharge current profile given the same average current.…”

Section: Introductionmentioning

confidence: 99%

VLIW instruction scheduling for minimal power variation

Xiao

Lai

2007

ACM Trans. Archit. Code Optim.

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The focus of this paper is on the minimization of the variation in power consumed by a VLIW processor during the execution of a target program through instruction scheduling. The problem is formulated as a mixed-integer program (MIP) and a problem-specific branch-and-bound algorithm has been developed to solve it more efficiently than generic MIP solvers. Simulation results based on the TMS320C6711 VLIW digital signal processor using benchmarks from Mediabench and Trimaran showed that over 40% average reduction in power variation can be achieved without sacrificing execution speed of these benchmarks. Computational requirements and convergence rates of our algorithm are also analyzed.Extension of conference paper [Xiao and Lai 2004]. The mixed-integer program in this paper makes use of a substantially improved set of constraints. The lower bound estimation of the branch-andbound algorithm has also been improved. The experimental results are, therefore, completely new.

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Battery-powered digital CMOS design

Cited by 41 publications

References 12 publications

Modulation Selection from a Battery Power Efficiency Perspective: A Case Study of PPM and OOK

Modulation Selection from a Battery Power Efficiency Perspective: A Case Study of PPM and OOK

Power-driven Real-time System Design with Energy Efficiency via ISA Customization

VLIW instruction scheduling for minimal power variation

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