Benchmark circuits for analog and mixed-signal testing

Kondagunturi, R.; Bradley, E. B.; Maggard, K.; Stroud, Charles E.

doi:10.1109/secon.1999.766127

Cited by 62 publications

(29 citation statements)

References 5 publications

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“…The circuit parameter values are as in the benchmark circuit maintained by Stroud et al [11]. We simulated the circuit at four different frequencies.…”

Section: Resultsmentioning

confidence: 99%

High sensitivity test signatures for unconventional analog circuit test paradigms

Sindia

Agrawal

2013

2013 IEEE International Test Conference (ITC)

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Abstract-A method of testing for parametric faults in analog circuits based on a polynomial representation of fault-free function of the circuit is presented. The response of the circuit under test (CUT) is estimated as a polynomial in the root mean square (RMS) magnitude of the applied input voltage at a relevant frequency or DC. The test then classifies the CUT as fault-free or faulty based upon a comparison of the estimated polynomial coefficients with those of the fault-free circuit. The test application needs very little augmentation of the circuit to make it testable as only output parameters are used for classification. The method is validated on an active elliptic filter and is shown to uncover parametric faults causing deviations as small as 5% from nominal values. Fault diagnosis based upon sensitivity of polynomial coefficients at relevant frequencies is discussed. Another type of circuit signatures in the form of probability moments of the output when test input is random noise are also proposed. It is shown that the sensitivity of either signature can be enhanced by a newly proposed nonlinear Vtransform. Finally, an adaptive test framework leveraging from these signatures and the transform technique is shown to improve defect level and yield loss.

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“…The circuit parameter values are as in the benchmark circuit maintained by Stroud et al [11]. We simulated the circuit at four different frequencies.…”

Section: Resultsmentioning

confidence: 99%

High sensitivity test signatures for unconventional analog circuit test paradigms

Sindia

Agrawal

2013

2013 IEEE International Test Conference (ITC)

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“…The measures (15,16) reach the unity value for the best results of approximation, i.e., for the SSE numerator zeroed there. So, the first two sections of the proposed fitness function (14) are responsible for the evaluation of mathematical model preciseness using the training and the examining parts of teaching patterns set, the third one determines the generalization level (by the model correctness comparing for the two independent sections of the patterns set, i.e., training and examining ones) and the last part of this figure generates the coefficient proportional to the number of selected explanatory variables (the observed WHT points).…”

Section: Phenotype Quality Checkingmentioning

confidence: 92%

“…The last experiment presents the usefulness of the described concept to the exemplary CMOS operational amplifier [14,16] performance parameters testing. This kind of verification may be started on the integrated circuit production line for the final product quality checking as well as production yield controlling.…”

Section: Example Cmos Operational Amplifier Performance Parameters Idmentioning

confidence: 99%

Analog Circuit Specification Testing by Means of Walsh–Hadamard Transform and Multiple Regression Supported by Evolutionary Computations

Golonek

Machniewski

2017

Circuits Syst Signal Process

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This paper describes an approach for an analog electronic circuit specification quick verification that is based on a simple mathematical model determined during the before-test stage statistical analysis. Generally, the observed performance parameters (e.g., cutoff frequency, phase shift at the assumed frequency point) are calculated from the Walsh-Hadamard transform components of circuit under test step time response. The optimal estimating formulas for relationship between the tested specifications and the selected components of the spectra are defined in the system based on a linear multiple regression procedure supported by genetic programming. The evolutionary computations significantly improve the approximation effectiveness by selecting the most representative points of the sequences domain and by defining the optimal set of linearizing functions. Finally, at the test stage, only a simple step stimulus and time-effective calculations are required to the tested performance parameters (specifications) of analog circuit identification and it predisposes the approach to quick production testing procedure realization or to embedding it in the mixed-signal systems. The automated built-in self-testing procedure using this concept may be easily implemented to low-cost microcontroller equipped with AD converter used for the testing response samples acquiring.

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“…The bound limits of relative amplitude and the relative phase associated with each component are obtained using Monte Carlo simulation [19]. In the fault-free circuit, the components are allowed to vary up to 1 sigma (σ) with σ being the standard deviation from the nominal value.…”

Section: Pre-testing Stagementioning

confidence: 99%

Analog Circuit Fault Detection Using Relative Amplitude and Relative Phase Analysis

Wang

2014

Automatika

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Original scientific paperA new method for detection of parametric faults occurring in analog circuits based on relative amplitude and relative phase analysis of the Circuit Under Test (CUT) is proposed. The relative amplitude is the common power change of the signals and the relative phase presents the relative phase offset of the signals. In the proposed method, the value of each component of the CUT is varied within its tolerance limit using Monte Carlo simulation. The upper and lower bounds of relative amplitude and phase of the CUT sampling series are obtained. While testing, the relative amplitude and phase value of the analog circuit are obtained. If any one of the relative amplitude and phase values exceed the bounds then the CUT is declared faulty. The effectiveness of the proposed method is validated through HSpice/MATLAB simulations of two benchmark circuits and the practical circuit test of TowThomas circuit.Key words: Relative amplitude, Relative phase, Parametric fault, Analog circuit, Fault detection Otkrivanje pogreške u analognim sklopovima analizom relativne amplitude i faze. U ovomečlanku predložena je nova metoda otkrivanja parametarskih pogrešaka u analognim sklopovima temeljena na analizi relativne amplitude i faze promatranog sklopa (eng. Circuit Under Test, CUT). Relativna amplituda predstavlja zajedničku promjenu snage signala, dok relativna faza predstavlja pomak u fazi meu signalima. U predloženoj metodi, koristeći Monte Carlo simulacije, vrijednost svake komponente CUT-a mijenja se unutar svojih granica tolerancije. Na taj način dobivaju se gornja i donja granica relativne amplitude i faze CUT uzoraka, dok se sama relativna amplituda i faza dobivaju tijekom testiranja. U slučaju da ijedan od tih dvaju faktora prelazi granicu, CUT se proglašava neispravnim. Učinkovitost predložene metode ispitana je pomoću HSpice/MATLAB simulacija nad dva referentna sklopa te na Tow-Thomas sklopu.Ključne riječi: relativna amplituda, relativna faza, parametarska pogreška, analogni sklop, otkrivanje neispravnosti

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Benchmark circuits for analog and mixed-signal testing

Abstract: This paper proposes a standard set of fault models and establishes acceptable component variations for a new set of benchmark circuits used to evaluate analog and mixedsignal testing techniques.

Cited by 62 publications

References 5 publications

High sensitivity test signatures for unconventional analog circuit test paradigms

High sensitivity test signatures for unconventional analog circuit test paradigms

Analog Circuit Specification Testing by Means of Walsh–Hadamard Transform and Multiple Regression Supported by Evolutionary Computations

Analog Circuit Fault Detection Using Relative Amplitude and Relative Phase Analysis

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