Proceedings of the Great Lakes Symposium on VLSI 2022 2022
DOI: 10.1145/3526241.3530381
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Benchmark Comparisons of Spike-based Reconfigurable Neuroprocessor Architectures for Control Applications

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Cited by 9 publications
(5 citation statements)
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“…We employed RAVENS for our neuromorphic hardware implementation [24,39]. RAVENS is a neuroprocessor for SNNs which has implementations in CPU Simulation, FPGA, and micro-controllers.…”
Section: Hardware Implementationmentioning
confidence: 99%
See 2 more Smart Citations
“…We employed RAVENS for our neuromorphic hardware implementation [24,39]. RAVENS is a neuroprocessor for SNNs which has implementations in CPU Simulation, FPGA, and micro-controllers.…”
Section: Hardware Implementationmentioning
confidence: 99%
“…RAVENS includes features such as I&F neuron model, linear charge leakage, axonal delay, adjustable resting potential, and programmable absolute and relative refractory period. Readers may refer to [39] for a detailed overview of the RAVENS neuroprocessor. The feature of RAVENS we target in this work is its STDP implementation.…”
Section: Hardware Implementationmentioning
confidence: 99%
See 1 more Smart Citation
“…In the domain of (neuro)robotics [79], viable tools have emerged over the past years [115,366,226], offering improved physics engines for simulating real-world robotic systems and some of the task environments in which they would operate. With respect to neuromorphic substrates, simulators of neuromorphic chips [196,217] and emulator kits, e.g., the RISP neuro-processor [282,281,130], have recently emerged; offering an alternative to expensive, non-mainstream hardware. However, while digital emulation might prove to be an invaluable solution, even serving as a force behind the rapid prototyping of early mortal computers, there is always a prescient gap between the fidelity and realism of a particular simulation and the real-world niche that it attempts to emulate, i.e., the "sim2real" problem [173].…”
Section: A3 On Neuromorphic Systems and The Body-niche Problemmentioning
confidence: 99%
“…In our prototype implementation, we have written simulators of two neuroprocessors developed by the TENNLab research team: RAVENS [7] and RISP [17]. Both employ clocked integrate-and-fire neurons, and synapses with integer delays.…”
Section: B the Neuroprocessormentioning
confidence: 99%