Benchmarking the PSP Compact Model for MOS Transistors

Abstract

Recently, the PSP model was selected as the first II. TRADITIONAL BENCHMARK TESTS surface-potential-based industry standard compact MOSFET Among the most important traditional benchmark tests are model. This work presents the results of several qualitative the mo importanttraditon tests are "benchmark" tests that over the last two years were used to the slope-ratio ( Fig. 1) and tree-top tests (Fig. 2), referring to verify the physical behavior of the new model and its usefulness the subthreshold behavior and Gm/Id ratio, respectively [6]. for future generations of CMOS IC design. These include The slope ratio is defined by newly developed tests and previously unavailable experimental data stemming from low-power, RF, mixed-signal, and analog SR -(12 + I1) (Vdb2 -Vdbl)(1) applications of MOSFETs. (I2-I1) (Vdb2 + Vdbl) where in Fig. 1 Vdbl = 0.01V and Vdb2= 0.02V. These tests I. INTRODUCTIONessentially require the qualitative behavior of the model to Compact MOSFET models are routinely required to sat-be similar to that of the Sah-Pao [8] or charge-sheet model isfy the conflicting requirements of accurate reproduction of [9]. Since PSP is a direct descendant of these models, it the minute details of transistor behavior (e.g. higher order easily passes both tests for all values of the model parameters. transconductances) and computational efficiency. The latter in-Another traditional test is the investigation of transcapacievitably implies the use of at least some empirical relations and tances as functions of the terminal bias with fine resolution various approximations in addition to the physics-based core to detect possible singular behavior. Typical results shown of the model. By using the surface-potential-based approach in Fig. 3 indicate continuous and physical behavior of PSP to compact modeling [1], one can significantly increase the transcapacitances, including the correct sign of Cbd and Cgb. physics content of the compact model, but the use of semi-The latter is problematic in some older models that separate empirical relations cannot be completely eliminated. Hence it charge and current submodels, but in PSP the symmetric is necessary to prevent unphysical behavior of the compact linearization technique [1] allows one to achieve consistency models sometimes observed as an unintended consequence of of both submodels with the desired outcome illustrated in Fig. various approximations [2]. Over the years two techniques 3. The design of certain circuits, most importantly of passive were found to be particularly useful for assuring the high RF mixers and transfer gates, requires symmetry of the model quality of compact models. The principle of the asymptotic with respect to the source-drain interchange (the "Gummel correctness [3] essentially states that even empirical equations Symmetry Test" or GST) [6], [7]. The circuit diagram for should become exact in extreme cases. This idea has been the GST is shown in Fig. 4 while typical results for PSP extensively used in the development and formulation of PSP. ...

(Invited) The new CMC standard compact MOS model PSP: advantages for RF applications

“…In the development of PSP, great care has been taken to maintain this symmetry under source-drain exchange or C 3 -continuity at V DS = 0 V, while implementing all necessary physical effects. Consequently, PSP passes all symmetry benchmark tests [15], [16]. From Fig.…”

PSP-SOI: A Surface Potential Based Compact Model of Partially Depleted SOI MOSFETs

“…In particular, while the mobility description remains the same, the velocity saturation model is changed to that of PSP and allows modeling of higher order derivatives at V DS = 0 [16]. The EVB tunneling model of PSP-SOI is a further advance, and also simplification, of [19] to provide a better fitting of experimental data.…”

“…Reflecting the state-of-the-art of bulk CMOS modeling in the previous decade, as summarized in [14]. The PSP-SOI model brings into SOI realm the advantages of the recently completed work on the development [15] and verification [16] of the surface potential based bulk MOSFET models.…”

RF benchmark tests for compact MOS models

“…Previously [1,2], a number of tests for compact MOSFET models have been described to benchmark dc aspects and capacitances of the model. They were successfully applied to the new industry standard PSP MOSFET model [3].…”

“…In this work, we instead focus on the modeling of non-quasistatic (NQS) effects and RF noise. Some of the test results were published by us before [1,[4][5][6]. In this paper, for the first time, the complete set is published, including their physical origin and derivation.…”