IEEE International Integrated Reliability Workshop Final Report, 2002.
DOI: 10.1109/irws.2002.1194245
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Bias and temperature dependent hot-carrier characteristics of sub-100 nm partially depleted SOI MOSFETs

Abstract: In this paper, we report hot-carrier behavior of sub-100nm partially depleted SO1 MOSFETs at room (25C) and high temperature (IOOC) under various stress conditions. It was observed that VG=VD was the worst case and more sensitive to temperature variation. SO1 is more sensitive to operation temperature than hulk transistors. Hot carrier activation energy has also been extracted in the experiments.

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Cited by 5 publications
(3 citation statements)
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“…In the inset, the ∆V th under low |V DS | stress condition shows division from the linear fitting, implying that the generation of hot carriers can be neglected and the HCS model is not valid in the low |V DS | bias region. The overall ∆V th caused by NBTI and HCS can be predicted by combining (2) and (3). The proposed model is highly consistent with the experimental results, as shown in Figs.…”
Section: Resultssupporting
confidence: 83%
See 1 more Smart Citation
“…In the inset, the ∆V th under low |V DS | stress condition shows division from the linear fitting, implying that the generation of hot carriers can be neglected and the HCS model is not valid in the low |V DS | bias region. The overall ∆V th caused by NBTI and HCS can be predicted by combining (2) and (3). The proposed model is highly consistent with the experimental results, as shown in Figs.…”
Section: Resultssupporting
confidence: 83%
“…In comparing with the requirement arisen from the pixels, the driving circuits have to control their output current precisely, which require devices with good electrical stability [1]. Hot carrier stress (HCS) has been widely studied and commonly used for reliability assurance [2]- [4]. However, because the LTPS TFT driving circuit is designed using the CMOSFET structure, the HCS becomes a transient phenomenon that mixes with the effects of negative bias temperature instability (NBTI) and positive bias temperature instability [5].…”
mentioning
confidence: 99%
“…The apparent lifetime activation energy, Ea/n, at lower temperatures does approach the classical 0.1 eV range but the local Ea/n at higher temperatures can exceed 0.65eV in the PFETs. These types of elevated activation energies have been reported by others [8] [12]. With HCI stress data from devices with high local temperatures, use of the Arrhenius model with a single high Ea/n extracted at high temperature results in significant over estimation of lifetime at typical use temperatures while use of traditional low temperature Ea/n, such as 0.1 eV, results in significant under estimation of lifetime at use temperatures.…”
Section: Self Heatingsupporting
confidence: 59%