Bimodal Weibull Distribution of Metal/High-$\kappa$  Gate Stack TDDB—Insights by Scanning Tunneling Microscopy

Yew, Kwang Sing; Ang, Diing Shenp; Bersuker, G.

doi:10.1109/led.2011.2174606

Cited by 22 publications

(23 citation statements)

References 7 publications

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“…13 and we observe negligible effect of RDF on TDDB. Early breakdowns due to GB defects in some of the devices gives rise to a bi-modal Weibull distribution, which is consistent with the observations reported in [28]. Since TDDB requires higher stress condition and defect density than BTI, the effect of RDF is negligible in both Fig.…”

Section: Resultssupporting

confidence: 88%

“…We divided the HK oxide layer in 42 grain-regions and assigned an average pre-existing GB defect density of 10 19 /cm 3 in 25% of the sample devices. Since the presence of GB defects compromises the underlying IL layer [28], we assumed 10 times higher IL layer defect generation rate in these devices. The simulation results for 3 rd soft breakdown is plotted in Fig.…”

Section: Resultsmentioning

confidence: 99%

“…However, the actual reason behind the bi-modal distribution observed by different groups is still controversial. Yew, et al [28] experimentally demonstrated that the presence of grain boundary (GB) defects in the HK layer can cause early breakdowns in many devices and can give rise to similar bi-modal Weibull distribution. We have also considered this effect in our simulation later in results and discussion section.…”

Section: Time Dependent Dielectric Breakdown (Tddb)mentioning

confidence: 99%

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Investigation of dependence between time-zero and time-dependent variability in high-κ NMOS transistors

Hassan

Roy

2017

Microelectronics Reliability

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Abstract-Bias Temperature Instability (BTI) is a majorreliability concern in CMOS technology, especially with High dielectric constant (High-κ/HK) metal gate (MG) transistors. In addition, the time independent process induced variation has also increased because of the aggressive scaling down of devices. As a result, the faster devices at the lower threshold voltage distribution tail experience higher stress, leading to additional skewness in the BTI degradation. Since time dependent dielectric breakdown (TDDB) and stress-induced leakage current (SILC) in NMOS devices are correlated to BTI, it is necessary to investigate the effect of time zero variability on all these effects simultaneously.To that effect, we propose a simulation framework to model and analyze the impact of time-zero variability (in particular, random dopant fluctuations) on different aging effects. For small area devices (~1000 nm 2 ) in 30nm technology, we observe significant effect of Random Dopant Fluctuation (RDF) on BTI induced variability (σ ΔVth ). In addition, the circuit analysis reveals similar trend on the performance degradation. However, both TDDB and SILC show weak dependence on RDF. We conclude that the effect of RDF on V th degradation cannot be disregarded in scaled technology and needs to be considered for variation tolerant circuit design.

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Section: Resultssupporting

confidence: 88%

Section: Resultsmentioning

confidence: 99%

Section: Time Dependent Dielectric Breakdown (Tddb)mentioning

confidence: 99%

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Investigation of dependence between time-zero and time-dependent variability in high-κ NMOS transistors

Hassan

Roy

2017

Microelectronics Reliability

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“…They must be found by maximum likelihood estimation. In fact, the composite Weibull failure rate distribution for two failure mechanisms will appear to have a very small Weibull shape parameter for the bulk failure rate, even if the underlying Weibull shape parameter for bulk failures is not small, as noted in [18]. The extracted Weibull characteristic lifetimes for both early failures and bulk failures are significantly larger for the test structure with wide lines if we assume a bimodal distribution.…”

Section: A Uniform Linewidth Test Structuresmentioning

confidence: 86%

“…15), from which we determine the Weibull parameters (η, β) (Figs. [16][17][18]. This (η, β) corresponds to a test structure associated with the vulnerable length, spacing pair (L, S D ), which is area scaled with (3) to find the dielectric segment Weibull parameters.…”

Section: Full Chip Lifetime Simulation Methodologymentioning

confidence: 99%

Impact of Linewidth on Backend Dielectric TDDB and Incorporation of the Linewidth Effect in Full Chip Lifetime Analysis

Bashir

Milor

2015

IEEE Trans. Semicond. Manufact.

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Low-k time-dependent dielectric breakdown (TDDB) has been found to vary as a function of metal linewidth, when the distance between the lines is constant. Modeling requires determining the relationship between TDDB and layout geometries. Therefore, comb test structures that vary pattern density and linewidth independently have been designed and implemented in 45 nm technology. Models are computed to estimate TDDB as a function of linewidth, and the cause of variation in TDDB behavior is investigated. The methodology to use the models for full-chip analysis is explained.Index Terms-Dielectric breakdown, integrated circuit reliability.

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Random Telegraph Noise Nano-spectroscopy in High-κ Dielectrics Using Scanning Probe Microscopy Techniques

Ranjan

Raghavan

Shubhakar

et al. 2020

Noise in Nanoscale Semiconductor Devices

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Bimodal Weibull Distribution of Metal/High-$\kappa$ Gate Stack TDDB—Insights by Scanning Tunneling Microscopy

Cited by 22 publications

References 7 publications

Investigation of dependence between time-zero and time-dependent variability in high-κ NMOS transistors

Investigation of dependence between time-zero and time-dependent variability in high-κ NMOS transistors

Impact of Linewidth on Backend Dielectric TDDB and Incorporation of the Linewidth Effect in Full Chip Lifetime Analysis

Random Telegraph Noise Nano-spectroscopy in High-κ Dielectrics Using Scanning Probe Microscopy Techniques

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