Binary histogram based split/merge object detection using FPGAs

Appiah, Kofi; Meng, Hongying; Hunter, Andrew; Dickinson, Patrick

doi:10.1109/cvprw.2010.5543760

Cited by 4 publications

(2 citation statements)

References 21 publications

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“…Various object detection and tracking algorithms are illustrated in the works though not including looming detection. Different algorithms are used to detect the objects like the Binary histogram which is based on split or merge [12], Haar classifiers, multi-object detection using grid based Histograms of Oriented Gradient (HoG) is presented in [13],colour detection, segmentation, etc., which aids in detecting the objects. Another approach of small object detection using infrared camera is shown in [14] and makes use of FPGA and Digital Signal Processing (DSP) for the computations.…”

Section: Related Workmentioning

confidence: 99%

Online Object Trajectory Classification Using FPGA-SoC Devices

Shinde

Machado

Santos

et al. 2018

Advances in Intelligent Systems and Computing

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Real time classification of objects using computer vision techniques are becoming relevant with emergence of advanced perceptions systems required by, surveillance systems, industry 4.0 robotics and agricultural robots. Conventional video surveillance basically detects and tracks moving object whereas there is no indication of whether the object is approaching or receding the camera (looming). Looming detection and classification of object movements aids in knowing the position of the object and plays a crucial role in military, vehicle traffic management, robotics, etc. To accomplish real-time object trajectory classification, a contour tracking algorithm is necessary. In this paper, an application is made to perform looming detection and to detect imminent collision on a system-on-chip field-programmable gate array (SoC-FPGA) hardware. The work presented in this paper was designed for running in Robotic platforms, Unmanned Aerial Vehicles, Advanced Driver Assistance System, etc. Due to several advantages of SoC-FPGA the proposed work is performed on the hardware. The proposed work focusses on capturing images, processing, classifying the movements of the object and issues an imminent collision warning on-the-fly. This paper details the proposed software algorithm used for the classification of the movement of the object, simulation of the results and future work.

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Section: Related Workmentioning

confidence: 99%

Online Object Trajectory Classification Using FPGA-SoC Devices

Shinde

Machado

Santos

et al. 2018

Advances in Intelligent Systems and Computing

View full text Add to dashboard Cite

show abstract

“…There are significant cost and complexity advantages in realizing a full system on a single reconfigurable architecture. The early stages of the final system, which detect and segment objects (using background differencing and connected components analysis) are described in [2], although in the current work we perform these stages using a CPU-based system [3], [4]. For efficient FPGA-based identification we use binary signatures (appearance feature vectors) which are easily processed.…”

Section: Introductionmentioning

confidence: 99%

Binary object recognition system on FPGA with bSOM

Appiah

Hunter

Dickinson

et al. 2010

23rd IEEE International SOC Conference

Self Cite

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Abstract-This paper introduces the implementation of an FPGA-based tri-state rule binary Self Organizing Map (bSOM), which takes binary inputs and maintains tri-state weights, with a node labelling algorithm which makes it capable of object classification. The bSOM is used for appearance-based object identification during tracking in video sequences. It is designed to provide part of an end-to-end surveillance system implemented wholly on FPGA. It is trained off-line using a labelled training data set for nine objects, using binary signatures extracted from the colour histogram, and successfully used for appearance-based identification of objects in approximately 85% of cases in a fairly challenging data set. The paper identifies how this preliminary work can be extended to provide full on-line appearance-based identification and tracking.

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FPGA implementation of Naive Bayes classifier for visual object recognition

Meng

Appiah

Hunter

et al. 2011

CVPR 2011 Workshops

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In this paper, a Naive Bayes classifier was simplified and implemented as a multi-class classification tool for binary\ud feature vectors. It was designed on FPGA using very limited hardware resources and runs quickly and efficiently in both training and testing phases. It was first tested on a handwriting digital number dataset, and then applied in the\ud visual object recognition on a single FPGA based visual surveillance system. It was compared with a binary Self Organizing Map (bSOM) using tri-states operation on FPGA, and the experimental results demonstrated both its higher\ud performance and lower resource usage on the FPGA chip

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Binary histogram based split/merge object detection using FPGAs

Abstract: Abstract

Cited by 4 publications

References 21 publications

Online Object Trajectory Classification Using FPGA-SoC Devices

Online Object Trajectory Classification Using FPGA-SoC Devices

Binary object recognition system on FPGA with bSOM

FPGA implementation of Naive Bayes classifier for visual object recognition

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