Binary to modified trinary number system conversion and vice-versa for optical super computing

Ghosh, Amal K.; Basuray, A.

doi:10.1007/s11047-009-9166-4

Cited by 14 publications

(4 citation statements)

References 24 publications

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“…Ternary encoding of data has been shown useful at least in the following contexts: general purpose computing [1], wireless transmission [2], [3], texture representation in images [4], quantum computing [5], optical super computing [6], and artificial neural networks [7] [8].…”

Section: Introductionmentioning

confidence: 99%

Efficient Decompression of Binary Encoded Balanced Ternary Sequences

Müller

Prost-Boucle

Bourge

et al. 2019

IEEE Trans. VLSI Syst.

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A balanced ternary digit, known as a trit, takes its values in {-1, 0, 1}. It can be encoded in binary as {11, 00, 01} for direct use in digital circuits. In this correspondence, we study the decompression of a sequence of bits into a sequence of binary encoded balanced ternary digits. We first show that it is useless in practice to compress sequences of more than 5 ternary values. We then provide two mappings, one to map 5 bits to 3 trits and one to map 8 bits to 5 trits. Both mappings were obtained by human analysis and lead to boolean implementations that compare quite favorably with others obtained by tweaking assignment or encoding optimization tools. However, mappings that lead to better implementations may be feasible.

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Section: Introductionmentioning

confidence: 99%

Efficient Decompression of Binary Encoded Balanced Ternary Sequences

Müller

Prost-Boucle

Bourge

et al. 2019

IEEE Trans. VLSI Syst.

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“…The Avizienis introduced a signed digit number as the parallelism of optical beam [2]. The modified signed digit [3][4][5] or modified trinary [6][7][8] number system also suggested the carry free operation. However, the ternary logic system based on three states was introduced by Lukasiewicz [9].…”

Section: Introductionmentioning

confidence: 99%

Optical New Quadruple Universal Gate (QUG) using SLM Based Savart Plate

2018

IJMTER

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Abstract-The advantages of technology during the last two decades have generated a large demand for handling large volumes of data at high speed. To meet up the requirements, the concept of multi valued logic (MVL) came forward from the status of the two-valued or binary logic system in the one hand and on the other, these include the idea of optical processor for switches. The conventional binary system has reached its saturation point in terms of complexity and data-handling. MVL system consists of a number of intermediate states between the true and false state instead of the conventional binary logic which consists of only two states "true" and "false". In quadruple valued logic (QVL) system the additional two intermediate states are denoted as "partially known" and "partially unknown". In this paper we have designed and implemented Optical New Quadruple Universal Gate (QUG) using Spatial Light Modulator (SLM) and Savart Plate. We have also explained their principles of operation used a theoretical model to fulfill this task, finally confirming through numerical simulations.

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“…Łukasiewicz (1920) initiated first, the use of ternary logic based on three states and modified it later with an idea that four states logic is a much better proposition. Among trinary logic modified trinary number (MTN) system gained importance for its carry free operation (Ghosh and Basuray, 2010). This study is an important extension of QVL system with a di-bit representation for implementation of quadruple flip-flops electronically using complementary metal oxide semiconductor (CMOS) (Yasuda et al, 1986;Chang and Lee, 1994) and optically using spatial light modulator (SLM) and Savart plate (Ghosh et al, 2012a(Ghosh et al, , 2012bBhattacharya and Ghosh, 2015).…”

Section: Introductionmentioning

confidence: 99%

Implementation of quadruple valued flip-flops using CMOS and spatial light modulator-based Savart plate

Bhattacharya¹,

Ghosh²,

Maity³

2018

IJNP

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The designing and simulation of multi-valued logic (MVL) is a very interesting and important task in the present scenario. The memory devices in MVL system are the most important area of modern research. The MVL system consists of a number of intermediate states between the true and false instead of the conventional binary logic consists of only two states-'true' and 'false'. Hence, the MVL enables more information to be handled in a much compact manner, especially suitable for handling big data. In quadruple valued logic (QVL) system, the additional two intermediate states are denoted as 'partially known' and 'partially unknown' which can be explored significantly to sequential logics also, e.g., flip-flops, etc. The present paper deals with the design and simulation of different kind of flip-flops in QVL system, using complementary metal oxide semiconductor (CMOS) and its optical implementation using spatial light modulator (SLM) and Savart plate.

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Binary to modified trinary number system conversion and vice-versa for optical super computing

Cited by 14 publications

References 24 publications

Efficient Decompression of Binary Encoded Balanced Ternary Sequences

Efficient Decompression of Binary Encoded Balanced Ternary Sequences

Optical New Quadruple Universal Gate (QUG) using SLM Based Savart Plate

Implementation of quadruple valued flip-flops using CMOS and spatial light modulator-based Savart plate

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