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The memory devices in multi-valued logic are of most significance in modern research. This paper deals with the implementation of basic memory devices in multi-valued logic using Savart plate and spatial light modulator (SLM) based optoelectronic circuits. Photons are used here as the carrier to speed up the operations. Optical tree architecture (OTA) has been also utilized in the optical interconnection network. We have exploited the advantages of Savart plates, SLMs and OTA and proposed the SLM based high speed JK, D-type and T-type flip-flops in a trinary system. Trinary system has already revealed its importance in optical computations. Modified trinary number (MTN) system and canonical signed digit (CSD) representation [1][2][3] play a significant role in performing free arithmetic operations. Datta et.al [4] presented a method in which the logic gates in MTN system have been implemented by spatial light modulator (SLM) and Savart plates. During last three decades, many high speed optoelectronic switches have been developed [5][6][7] . These developments have turned the design and fabrication of optical computer into reality, and thus impelled the implementation of different elements associated with a computer system [8][9][10] using multivalued logic. For any computation system, the memory elements are incommensurable and significant for the smooth functioning of the system. In trinary system the memory elements also reveal a great importance for the fastest operations. The configurations of trinary memory element flip-flap-flop differ from the binary flip-flop in respect of three stable outputs. Binary memory element called "flip-flop" is the most important device with two stable states. It holds a state until a proper input pulse is applied on it. It is well known that the basis of the classical binary "flip-flop" is a logical circuit consisting of the two logical elements: OR-NOT. The modified trinary system has three output states simultaneously and are called flip-flap-flop [11][12][13] . We have considered here the logical circuit for the trinary system consisting of the logical elements so that the three stable outputs are present.A system with two inputs J and K and three outputs Q A , Q B and Q C is shown in Fig.1. The nine possible excitation inputs and correspondingly nine controlled functions at the output are shown in Tab.1. The three states (0,0), (1,1) and (1 , 1 ) are considered as the reset and set conditions, respectively.From Tab.1, it is clear that the possible states of the trinary system are available at the output except for the reset and set conditions. Moreover, it should be noted that the outputs Q A and Q C are the same as the inputs J and K , respectively -when Q B changes. The truth table for the different trinary logic gates are given in Tab.2 and it is clear that Q B can be obtained from the condition [14] , Fig.1 Block diagram of trinary flip-flopThe three-states of the trinary representation are classified as the true, false and contradictory, as represented in Tab.3.(J AND ...

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