This paper addresses hardware implementation of a power efficient retinal encoder system used in visual prosthesis equipment for blind people. The hardware architecture is inspired from the retinal receptive fields in mammalian vision system. The captured image is passed through several filter banks in different filtering stages in primate vision system. As the photoreceptors in the primate vision system are arranged in hexagonal fashion, the hexagonal tessellation scheme was found to be the most suitable sampling scheme for retinal image processing. In this work, the hardware implementation of different retinal filtering stages and final edge detection scheme is performed in Altera Cyclone II FPGA and in Synopsys Design Vision. An area efficient Cellular Logic Array Processing (CLAP) algorithm is used as the final stage edge detector. Both rectangular and hexagonal edge detection schemes were tested and their performance was analysed using Berkeley Segmentation Dataset and ROC performance scheme.