2016
DOI: 10.1038/srep24920
|View full text |Cite
|
Sign up to set email alerts
|

Black Phosphorus Based Field Effect Transistors with Simultaneously Achieved Near Ideal Subthreshold Swing and High Hole Mobility at Room Temperature

Abstract: Black phosphorus (BP) has emerged as a promising two-dimensional (2D) material for next generation transistor applications due to its superior carrier transport properties. Among other issues, achieving reduced subthreshold swing and enhanced hole mobility simultaneously remains a challenge which requires careful optimization of the BP/gate oxide interface. Here, we report the realization of high performance BP transistors integrated with HfO2 high-k gate dielectric using a low temperature CMOS process. The fa… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1
1

Citation Types

1
20
0

Year Published

2016
2016
2019
2019

Publication Types

Select...
9

Relationship

4
5

Authors

Journals

citations
Cited by 38 publications
(21 citation statements)
references
References 38 publications
1
20
0
Order By: Relevance
“…1f). Based on the obtained KPFM results and the previously reported band properties (conduction band minimum, valence band maximum and band gap ( E g )) of BP and ReS 2 (refs 42, 43, 44), we graphically described the predicted energy band alignment of the BP and ReS 2 heterojunction at equilibrium before contact (Fig. 1g) and after contact (Fig.…”
Section: Resultsmentioning
confidence: 92%
“…1f). Based on the obtained KPFM results and the previously reported band properties (conduction band minimum, valence band maximum and band gap ( E g )) of BP and ReS 2 (refs 42, 43, 44), we graphically described the predicted energy band alignment of the BP and ReS 2 heterojunction at equilibrium before contact (Fig. 1g) and after contact (Fig.…”
Section: Resultsmentioning
confidence: 92%
“…Furthermore, high-k dielectrics have also been employed to passivate the upper surface of BP to reduce scattering [36,91,93,94]. Near ideal SS values were successfully achieved at room temperature by improving the BP/HfO 2 interface quality with thermal treatments [94,95]. Particularly, a record drain current exceeding 1 A/mm has been achieved by integrating 3 nm of HfO 2 and 20 nm of ZrO 2 [93].…”
Section: Dielectric Engineeringmentioning
confidence: 99%
“…[33][34][35][36] Notably, a hole mobility of ≈536 cm 2 V −1 s −1 and a near ideal SS of ≈66 mV.dec −1 are achieved simultaneously with an ultrathin 3.4 nm HfO 2 gate dielectric. High-performance BP transistors with a thin HfO 2 back gate dielectric have been successfully demonstrated.…”
Section: The Effect Of Gate Dielectric In Bp Fetmentioning
confidence: 91%