BLADES: an artificial intelligence approach to analog circuit design

Computer-aided design of analog and mixed-signal integrated circuits

“…Finding the optimal circuit topology for a given set of performance specifications is rather heuristic in nature and brings to bear the real expert knowledge of a designer. Thus, it was only natural that the first topology selection approaches like in OASYS [10], BLADES [62], or OPASYN [63] were rather heuristic in nature in that they used rules in one format or another to select a proper topology (possibly hierarchically) out of a predefined set of alternatives stored in the tool's library.…”

“…Also, AZTECA [73] and CATALYST [74] use the design-plan approach for the high-level design of successive-approximation and high-speed CMOS data converters, respectively. Inspired by artificial intelligence research, also other ways to encode the knowledge have been explored, such as in BLADES [62], which is a rule-based system to size analog circuits, in ISAID [75], [76] or in [77].…”

Simulated Annealing to Improve Analog Integrated Circuit Design: Trade-Offs and Implementation Issues

“…Previous works have been done in the field of analog design automation to enable fast design at the block level. Different strategies and approaches have been proposed during the evolution of analog design automation, such as simulation-based optimization [5,9,17], symbolic simulation [10], artificial intelligence [6], manually derived design equations [4,21], hierarchy and topology selection [11], geometric programming [12,16] and memetic algorithms [15]. The main difficulty encountered for wide spread usage of these tools is that they require appropriate modeling of both devices (technology dependent) and circuit topologies in order to achieve the design objectives in a reasonable processing time.…”

An approach to topology synthesis of analog circuits using hierarchical blocks and symbolic analysis

“…Hence, analog circuit synthesis is one critical step, which includes topology generation/selection and circuit sizing [1]. Up to now there are several approaches providing ideas and solutions for automated topology synthesis of analog circuits in different ways: OASYS [2], BLADES [3] are based on a library with a set of well-defined topologies, from which a proper topology will be selected. Some sized topology generation approaches e.g.…”