2015
DOI: 10.1007/978-3-319-16295-9_6
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Block Cipher Speed and Energy Efficiency Records on the MSP430: System Design Trade-Offs for 16-Bit Embedded Applications

Abstract: Abstract. Embedded microcontroller applications often experience multiple limiting constraints: memory, speed, and for a wide range of portable devices, power. Applications requiring encrypted data must simultaneously optimize the block cipher algorithm and implementation choice against these limitations. To this end we investigate block cipher implementations that are optimized for speed and energy efficiency, the primary metrics of devices such as the MSP430 where constrained memory resources nevertheless al… Show more

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Cited by 15 publications
(9 citation statements)
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“…Of course, our baseline implementation on MSP430 can be improved by using assembly codes. A recent work on similar ciphers (SPECK‐96) shows that assembly coding can improve the efficiency on MSP430 by 4× [29] which is, as expected, not enough to compensate for an efficiency gap of three orders of magnitude. Moving to a dedicated solution [5] further improves the efficiency at the expense of flexibility.…”
Section: World Of Practice: Results and Comparisonsmentioning
confidence: 81%
“…Of course, our baseline implementation on MSP430 can be improved by using assembly codes. A recent work on similar ciphers (SPECK‐96) shows that assembly coding can improve the efficiency on MSP430 by 4× [29] which is, as expected, not enough to compensate for an efficiency gap of three orders of magnitude. Moving to a dedicated solution [5] further improves the efficiency at the expense of flexibility.…”
Section: World Of Practice: Results and Comparisonsmentioning
confidence: 81%
“…There have been a number of results demonstrating record-breaking FPGA implementations [8,23], some with side channel mitigations [12,28], and highly efficient microcontroller implementations [11,17,20]. Novel uses have been proposed, including explorations showing the suitability of Simon in the decidedly non-lightweight realm of homomorphic encryption [27,18].…”
Section: Others' Workmentioning
confidence: 99%
“…Indeed, several improvements have been realized to reach this goal in both hardware and software implementations. Examples of these variations include AES-128 hardware ASCI implementation with 2400 Gate Equivalents (GE) is presented in [13], while efficient software AES implementations for 8-bit in [14], 16-bit in [15] and 32-bit in [16]. Moreover, AES optimized instructions were added to the instruction set of Intel's [17,18].…”
Section: Related Workmentioning
confidence: 99%