Board level solder reliability versus ramp rate and dwell time during temperature cycling

Zhai, C.J.; Sidharth,; Blish, R.C.

doi:10.1109/tdmr.2003.820056

Cited by 44 publications

(14 citation statements)

References 5 publications

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“…Thermo-mechanical response of the solder to thermal fatigue loading is modelled with ANAND's visco-plasticity not just because many previous studies [28][29][30][31][32][33] have employed the same model in investigations of similar nature. In actual usage conditions, the temperature cycle duration of solder joints is in the order of minutes to days and the homologous temperature is within the creep region.…”

Section: Materials and Propertiesmentioning

confidence: 99%

Prediction of damage and fatigue life of high-temperature flip chip assembly interconnections at operations

Amalu

Ekere

2012

Microelectronics Reliability

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Section: Materials and Propertiesmentioning

confidence: 99%

Prediction of damage and fatigue life of high-temperature flip chip assembly interconnections at operations

Amalu

Ekere

2012

Microelectronics Reliability

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“…(2) as deduced for each of the four top extraction layers (figs. 10,11). The legend indicates that the assessment criterion ofR 2 ~ 0.8 is satisfied in all cases as values between 0.8 (layer #1) and 0.9 (layer #2) are reached.…”

Section: Results Of Simulationmentioning

confidence: 99%

Accurate thermal cycle lifetime estimation for BGA memory components with lead-free solder joints

Gromala¹,

Reichelt

Rzepka³

2009

EuroSimE 2009 - 10th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelect

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The paper reports the results of a systematic improvement project on the thermal cycle (TC) lifetime prediction of BGA memory modules with SnAg1.0Cu0.5 and SnAg1.0Cu0.5Ni0.05 solder alloys. The pre-existing lifetime modeling scheme allowed predictions with an inaccuracy factor of about 1.6plusmn1 on average while in TC experiments, the characteristic lifetime, N63, showed a standard deviation of about 0.3 N63 when tests were repeated for the same product. After analyzing the weaknesses of the pre-existing scheme, improvements were introduced to the geometric, the material, and the load models. Afterwards, the creep strain energy density accumulated in the critical layers of the solder joints during one steady state TC was computed. Correlating it to the N63, the coefficients of the lifetime model have been determined. Based on this, the TC lifetime expectancy of BGA memory systems has been predicted for different product configurations (two packages, two solder alloys, two PCBs) exposed to several thermal cycle profiles. Comparing all estimates to test results, the prediction inaccuracy has been shown to be reduced down to the level of 1.3plusmn1-N63 on average. This meets the range of experimental standard deviation

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“…On the other hand, it has been reported in [22,23] that the die-attach lifetime decreases when the dwell time increases. Typical values of the dwell time in thermal cycling experiments are between 7 and 15 min and, for example, the MIL-STD-883H standard suggests 10 min.…”

Section: Thermal Cycling Definitionmentioning

confidence: 94%

Thermal cycling analysis of high temperature die-attach materials

Navarro¹,

Perpiñà²,

Vellvehı́³

et al. 2012

Microelectronics Reliability

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Board level solder reliability versus ramp rate and dwell time during temperature cycling

Cited by 44 publications

References 5 publications

Prediction of damage and fatigue life of high-temperature flip chip assembly interconnections at operations

Prediction of damage and fatigue life of high-temperature flip chip assembly interconnections at operations

Accurate thermal cycle lifetime estimation for BGA memory components with lead-free solder joints

Thermal cycling analysis of high temperature die-attach materials

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