10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings.
DOI: 10.1109/async.2004.1299293
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Bolstering faith in GasP circuits through formal verification

Xiaohua Kong
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R. Negulescu
2
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Cited by 3 publications
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Verifying Timed, Asynchronous Circuits using ACL2

Peng
1
,
Greenstreet
2
2019
2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
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Verifying Timed, Asynchronous Circuits using ACL2

Peng
1
,
Greenstreet
2
2019
2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
1
0
0
0
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Investigating the FIFO design styles based on the Balsa synthesis system

Chen
1
,
Lee
2
,
Hsieh
3
2011
2011 International Symposium on Integrated Circuits
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Semihiding operators and active-edge specification

Kong
1
,
Negulescu
2
2006
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
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