Future electronic packaging technology requires semiconductor chips having a larger size and higher power for advanced applications, e.g., new energy conversion systems, electric vehicles, and data center servers, yet traditional thermal interface materials (TIMs) with a high thermal conductivity are generally stiff materials with weak joints, which cause the accumulated thermal stress to concentrate at the chip corners, leading to cracking and popcorn problems. To address such a critical challenge, herein for the first time we report a low-cost and high-performance porous copper (Cu)−indium (In) laminar structure as TIM, which can provide a superior thermal conductivity (50 W m −1 K −1 ) comparable to indium, yet the Young's modulus (1.0 GPa) is an order of magnitude lower than indium, which is a state-of-the-art value. Additionally, the In-based intermetallic compound (IMC) joints enable more robust mechanical interconnection above the melting point of pure indium, providing better high-temperature performance. The discontinuous IMCs spread the global interfacial thermal stress into numerous isolated local areas, ensuring a reliable joint to resist thermal−mechanical fatigue. In the silicon-TIM-copper package testing vehicles with a large die size (1 × 1 square inch), this structure shows excellent thermal management ability and superior reliability, compared with classical indium and classic commercial silver pastes.