Boosting Throughput and Efficiency of Hardware Spiking Neural Accelerators Using Time Compression Supporting Multiple Spike Codes

Abstract

Spiking neural networks (SNNs) are the third generation of neural networks and can explore both rate and temporal coding for energy-efficient event-driven computation. However, the decision accuracy of existing SNN designs is contingent upon processing a large number of spikes over a long period. Nevertheless, the switching power of SNN hardware accelerators is proportional to the number of spikes processed while the length of spike trains limits throughput and static power efficiency. This paper presents the first study on developing temporal compression to significantly boost throughput and reduce energy dissipation of digital hardware SNN accelerators while being applicable to multiple spike codes. The proposed compression architectures consist of low-cost input spike compression units, novel input-and-output-weighted spiking neurons, and reconfigurable time constant scaling to support large and flexible time compression ratios. Our compression architectures can be transparently applied to any given pre-designed SNNs employing either rate or temporal codes while incurring minimal modification of the neural models, learning algorithms, and hardware design. Using spiking speech and image recognition datasets, we demonstrate the feasibility of supporting large time compression ratios of up to 16×, delivering up to 15.93×, 13.88×, and 86.21× improvements in throughput, energy dissipation, the tradeoffs between hardware area, runtime, energy, and classification accuracy, respectively based on different spike codes on a Xilinx Zynq-7000 FPGA. These results are achieved while incurring little extra hardware overhead.

Ultra-low Latency Spiking Neural Networks with Spatio-Temporal Compression and Synaptic Convolutional Block

“…Inspired by human neurons' working patterns, spiking neural networks (SNNs) are considered as the third generation artificial neural network [1]. With the development of SNNs, a large range of applications have been demonstrated including image classification [2][3], video processing [4] [5], posture and gesture recognition [6] [7], voice recognition [8] [9]. Compared with traditional artificial neural networks (ANNs) which consist of static and continuous-valued neuron models, spiking neural networks (SNNs) have a unique event-driven computation characteristic that can respond to the events in a nearly latency-free and power-saving way [10] [11], and it is naturally more suitable for processing event stream class.…”

“…Otherwise, the accuracy of the SNNs will drop significantly. In [7], a temporal compression method is proposed which can reduce the length of event streams by shrinking the duration of the input event trains. However, this method is only applied to the trained SNNs, which limits its potential.…”

Direct Training via Backpropagation for Ultra-low Latency Spiking Neural Networks with Multi-threshold

“…computing systems [2]. For instance, IBM's TrueNorth [3] and Intel's Loihi [4] process a single spike with a few pJ of energy.…”

“…In recent years, many researchers have focused on the problem of the latency of SNNs and tried to solve the problems we mentioned above. Some researchers try to propose novel encoding methods to improve the efficiency of information representation to reduce the latency of SNNs [2], [6]- [8]. In [8], authors proposed a phase coding method to encode input spikes by the phase of a global reference clock and achieve latency reduction over the rate coding for image recognition.…”

“…Compared with rate coding, the proposed method can reduce the number of time steps from hundreds to tens. In [2], authors proposed a time compression method to compress the temporal domain of spike training which can achieve up to 16× speedup with little accuracy loss. However, the achievable latency/spike reduction of a particular code can vary widely with network architecture and application.…”