2017 IEEE 26th Asian Test Symposium (ATS) 2017
DOI: 10.1109/ats.2017.30
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Bringing Fault-Tolerant GigaHertz-Computing to Space: A Multi-stage Software-Side Fault-Tolerance Approach for Miniaturized Spacecraft

Abstract: Modern embedded technology is a driving factor in satellite miniaturization, contributing to a massive boom in satellite launches and a rapidly evolving new space industry. Miniaturized satellites, however, suffer from low reliability, as traditional hardware-based fault-tolerance (FT) concepts are ineffective for on-board computers (OBCs) utilizing modern systems-on-a-chip (SoC). Therefore, larger satellites continue to rely on proven processors with large feature sizes. Software-based concepts have largely b… Show more

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Cited by 3 publications
(3 citation statements)
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“…The entire Stage1-3 form a closed cycle, which implements FDIR in several steps as depicted in Figure 1. Additional implementation details on Stage 1's thread-level coarse-grain lockstep, beyond what is briefly described in Section VI is available in [26]. In low-end nanosatellites (e.g.…”
Section: System Overview and Requirementsmentioning
confidence: 99%
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“…The entire Stage1-3 form a closed cycle, which implements FDIR in several steps as depicted in Figure 1. Additional implementation details on Stage 1's thread-level coarse-grain lockstep, beyond what is briefly described in Section VI is available in [26]. In low-end nanosatellites (e.g.…”
Section: System Overview and Requirementsmentioning
confidence: 99%
“…If necessary, it then also executes relevant update callbacks and then resumes application execution. We published an in depth description of these mechanics as well as benchmark results for an astronomical application in [26].…”
Section: A Dynamic Tiled Mpsoc Architecturementioning
confidence: 99%
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