Built-In Self-Test of MEMS Accelerometers

Abstract

A built-in self-test technique that is applicable to symmetric microsystems is described. A combination of existing layout features and additional circuitry is used to make measurements from symmetrically located points. In addition to the normal sense output, self-test outputs are used to detect the presence of layout asymmetry that are caused by local, hard-to-detect defects. Simulation results for an accelerometer reveal that our self-test approach is able to distinguish misbehavior resulting from local defects and global manufacturing process variations. A mathematical model is developed to analyze the efficacy of the differential built-in self-test method in characterization of a wide range of local manufacturing variations affecting different regions of a device and/or wafer. Model predictions are validated by simulation. Specifically, it has been shown that by using a suitable modulation scheme, sensitivity to etch variation along a particular direction is improved by nearly 30%.[1394]

Micromechanical Characterization of Polysilicon Films through On-Chip Tests

“…A class of deterministic methods is based on the surface inspection of the devices through SEM imaging or laser interferometry [ 15 , 16 , 17 ]; these methods are not only slow to perform, but also limited to devices on open wafers, while commercial ones are usually packed to protect the system from the environment. Other methods use embedded structures for device characterization [ 11 , 18 , 19 ]. The deviation of the pull-in voltage from the expected value can be also adopted for process characterization [ 20 , 21 , 22 ]; however, the pull-in value is very sensitive to the accuracy of the model.…”

A ΣΔ Closed-Loop Interface for a MEMS Accelerometer with Digital Built-In Self-Test Function

“…Besides waiting for the evolution of MEMS process, the in situ self-test and self-calibration will provide a promising new point of view on these problems [ 13 ] and, thus, attract extensive research attention worldwide [ 13 , 14 , 15 , 16 , 17 , 18 , 19 , 20 , 21 , 22 , 23 , 24 , 25 , 26 , 27 , 28 ]. Although use of built-in self-test (BIST) units has been a routine technique in most mixed-signal system-on-chip (SoC) design flows [ 14 , 15 ], obstacles are encountered when implanting to an EM-ΣΔ system.…”

“…Many researchers have proposed diverse functional BIST methods, by incorporating the MEMS structure into a phase-lock loop (PLL) [ 16 ], resonator [ 17 ], or charge-pump [ 18 ] circuit, then, the working state of the circuit will be an indicator of malfunction. A more precise functional BIST is static symmetry testing, which can identify the location of defects by applying an electrostatic force on symmetrically distributed testing electrodes, and observing the output response [ 19 ]. However, the efficacy of these methods is limited, and the implementations are too dedicated to be widely adopted.…”

A Wafer-level pressure calibration method for integrated accelerometer and pressure sensor in TPMS application

“…Full-range calibration of a 100g measure range accelerometer needs a vibration calibrator or a centrifuge to provide larger acceleration, but these equipments are difficult to use in wafer-level testing because of severe mechanical vibration. Some electrostatic excitation methods have been introduced to capacitive and convective accelerometers' self-test to avoid mechanical vibration [2] [3]. But for piezoresistive accelerometers, electrostatic excitation needs extra capacitive structures and process steps [4], which is not quite fit for low cost TPMS application.…”