Buried tungsten silicide layer in silicon on insulator substrate by Smart-Cut®

Abstract

A single-crystalline Si/SiO 2 /poly-WSi x /Sub-Si structure has been successfully fabricated by a new method incorporating a standard smart-cut ® technique and a high temperature reaction between tungsten and silicon. Annealing at 800-1100 • C does not only strengthen the bonding of the wafers but also induces solid phase reaction of deposited tungsten and silicon. A poly-crystalline WSi x (1 < x < 2) layer with a tetragonal structure is formed below the buried oxide layer. Cross section images of TEM show three steep interfaces of the four layers. It is found that increasing the annealing temperature is in favour of decreasing the sheet resistance of tungsten silicide and improving the crystal quality of the top silicon layer. However, a spreading resistance profile measurement shows that annealing under high temperature ( 1000 • C) will induce diffusion of tungsten into the Si substrate which is confirmed by the EDX results and the reason is presented.

Thermal stability of CoSi2layers implemented in a silicon-on-insulator substrate

“…High melting point silicides are more stable against Si and, in addition, they allow self-aligned processing and have low electrical resistivities. Tungsten silicide has been successfully bonded to fabricate silicon-on-metal-on-insulator (SMOI) structures [2][3][4][5]. However, self-aligned silicidation of tungsten is very difficult.…”

“…However, self-aligned silicidation of tungsten is very difficult. Furthermore, the alternative approach, bonding of a W layer against Si to form a buried silicide layer needs very high temperature annealing [5], and the resulting tungsten silicide has a fairly large resistivity. Among the common silicides, CoSi 2 , TiSi 2 and NiSi have been widely used in self-aligned CMOS technologies due to their lower resistivities and high scalability.…”