By-passing the out-of-order execution pipeline to increase energy-efficiency

Abstract

Out-of-order execution significantly increases the performance of superscalar processors. The out-of-order execution mechanism is, however, energy-inefficient, which inhibits scaling superscalar processors to high issue widths and large instruction windows. In this paper, we build on the observation that between 19% and 36% of the instructions are immediately ready for execution, even before entering the issue queue. Yet, these instructions proceed to the energy-consuming steps of instruction wake-up and select and they needlessly occupy space in the issue queue. To save energy, we propose for these instructions to by-pass the out-of-order execution core. Instead, we execute them on an energy-efficient single-issue in-order by-pass pipeline. The by-pass pipeline executes a significant fraction of all instructions, allowing performance-energy trade-offs with respect to the issue width of the out-of-order pipeline and to the issue queue size. By making these trade-offs, we show energy reductions of 53% for the issue queue, 33% for the register file and 31% in the write-back and wake-up logic. Performance remains almost unaffected.

Advances in computer architecture

“…However, hardware logic and energy is required for the dependency analysis to determine if instructions can overtake each other. Also, since instructions are executing out-of-order, a reorder buffer is required for the in-order completion to provide the expected results [46]. Out-of-order execution introduces additional dependencies e.g.…”