Efficiently Scaling Out-of-Order Cores for Simultaneous Multithreading

Sleiman, Faissal M.; Wenisch, Thomas F.

doi:10.1109/isca.2016.45

Cited by 10 publications

(1 citation statement)

References 43 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…For example, MorphCore [29] can operate as both an OoO core or a SMT core. Shelf [43] utilizes an in-order pipeline within an OoO core for higher efficiency, whereas Outrider [9] utilizes a SMT core and decoupled execution to achieve higher memory latency tolerance.…”

Section: Related Workmentioning

confidence: 99%

Efficient Data Supply for Parallel Heterogeneous Architectures

Ham

Aragón

Martonosi

2019

ACM Trans. Archit. Code Optim.

View full text Add to dashboard Cite

Decoupling techniques have been proposed to reduce the amount of memory latency exposed to highperformance accelerators as they fetch data. Although decoupled access-execute (DAE) and more recent decoupled data supply approaches offer promising single-threaded performance improvements, little work has considered how to extend them into parallel scenarios. This article explores the opportunities and challenges of designing parallel, high-performance, resource-efficient decoupled data supply systems. We propose Mercury, a parallel decoupled data supply system that utilizes thread-level parallelism for high-throughput data supply with good portability attributes. Additionally, we introduce some microarchitectural improvements for data supply units to efficiently handle long-latency indirect loads. CCS Concepts: • Computer systems organization → Heterogeneous (hybrid) systems; Parallel architectures;

show abstract

Section: Related Workmentioning

confidence: 99%