2010 NASA/ESA Conference on Adaptive Hardware and Systems 2010
DOI: 10.1109/ahs.2010.5546246
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Calibrating a predictive cache emulator for SoC design

Abstract: Pre-fetching in a memory hierarchy is known to alleviate the "memory wall" paradigm but its use is impeded because of the difficulty to estimate efficiency when used in a complex system such as a SoC (System on Chip) or NoC (Network on Chip). Therefore, some methods are needed to evaluate the benefit of pre-fetching at the earliest possible stage in a design flow to help the designer choose architectural parameters or transform the application algorithm.In this paper we show that the emulation platform impleme… Show more

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Cited by 2 publications
(2 citation statements)
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“…Also, we make the assumption that the processing unit is able to perform one fetch each clock cycle and sometimes waits for a datum when it is not present in the cache. In [20], we have shown that the performances measured on an emulation platform made of a PowerPC connected to a 2D-AP Cache 3 fit the ones obtained by simulation. More precisely the cache efficiency can be normalised by the ratio between the fetch period and the background memory latency.…”
Section: Metricsmentioning
confidence: 59%
See 1 more Smart Citation
“…Also, we make the assumption that the processing unit is able to perform one fetch each clock cycle and sometimes waits for a datum when it is not present in the cache. In [20], we have shown that the performances measured on an emulation platform made of a PowerPC connected to a 2D-AP Cache 3 fit the ones obtained by simulation. More precisely the cache efficiency can be normalised by the ratio between the fetch period and the background memory latency.…”
Section: Metricsmentioning
confidence: 59%
“…The 3D-AP Cache may be linked to a classic general purpose processor (or a DSP) or to an hardware accelerator dedicated to ray-shooting. We have shown in [20] that a 2D-AP Cache connected to a processor allows better performances than a standard cache. Performing ray-shooting with programmable processors connected to 3D-AP Cache should still benefit of the pre-fetching mechanisms.…”
Section: Discussion and Improvementsmentioning
confidence: 99%