Carrier-based PWM strategies for the comprehensive capacitor voltage balance of multilevel multileg diode-clamped converters

Abstract

Abstract- This paper presents four carrier-based PWM strategies for diode-clamped converters of any number of levels and any number of legs (phases). These carrier-based PWM strategies guarantee the dc-link capacitor voltage balance in every switching cycle without the need of additional hardware and with low dc-link capacitance values for any modulation index and load, provided that the sum of leg currents equals zero. The performance of the presented carrier-based PWM strategies, in terms of dc-link capacitor voltage balance and total harmonic distortion in the output line-to-line voltages, is evaluated through simulation, showing a tradeoff between the simplicity of the carrier-based PWM implementation and its total harmonic distortion performance.

An Adaptive Multistep Balancing Modulation Technique for Multipoint-Clamped Converters

“…The core of the proposed algorithm is synthetized in the "MOD" blocks, whose inputs are the reference leg voltages v k * and the currents ik and whose outputs are the duty-cycles dk,h (with k = 1,2,3 denoting the phase and h = 1, …, N − 1 denoting the level). The corresponding switching signals are then obtained through the comparison with a common triangular carrier waveform, coherently with the multiple-references/single-carrier working principle [30][31][32][33][34][35]. To further improve the switching frequency reduction, the increase of the number of switching levels via (19) has been applied only when the voltage disbalances ∆vdc,Bot and ∆vdc,Top are higher than a given multi-step threshold ∆vth.…”

“…To overcome this drawback, other approaches [30][31][32][33][34][35]] employ a multiple-references/single-carrier comparison, which guarantees the independent control of each switching device and allows the output voltage to switch between many feasible levels in the same modulation period, thus exhibiting a Multi-Step behaviour. The main drawback here is represented by the increase of the switching losses and by a general worsening of the output voltage harmonic content, due to the presence of multiple switching transitions in each modulation interval.…”

Topology, Efficiency Analysis, and Control of a Four-Level $\pi$ -Type Converter

“…The voltage drift in neutral points may affect the system stability as well as the output harmonics. Active neutral point voltage control methods have been researched in [18,19], [21][22][23][24][25][26][27][28][29][30][31][32][33]. Control methods based on a virtual vector PWM (VV PWM) can achieve the dc-link capacitor voltage balance with a passive front-end for a fourlevel converter or even n-level converters under any power factors and modulation indices [28][29][30][31].…”

“…In addition, the carrier-based implementation of VV PWM is relatively computationally intensive. For an n-level converter, it requires n-1 modulation waves in each phase, and corresponding offsets to each modulation wave have to be calculated according to the requirements specifically [24,36]. The conventional nearest-three-vectors PWM (NTV PWM) for the diode-NPC four-level converter can optimize the switching loss and the total harmonic distortion (THD) [4,22,23,27,32,33] and in each switching period only two voltage levels are used and there are only two switching actions.…”

A Simplified Virtual Vector PWM Algorithm to Balance the Capacitor Voltages of Four-Level Diode-Clamped Converter

“…So, the subsectors identification and the computation of duty ratios have become more complicated by using VVPWM for higher levels of DCCs [43]. Later on, several carrier-based equivalent implementation of VVPWM applicable to any number of levels have been reported in literature [44][45][46][47]. Phase duty-ratios are obtained with simple mathematical expressions without identifying the location of the reference vector in space vector diagram.…”