Carry-save Montgomery modular exponentiation on reconfigurable hardware

Cilardo, Alessandro; Mazzeo, Antonino; Romano, Luigi; Saggese, G.P.

doi:10.1109/date.2004.1269231

Cited by 25 publications

(25 citation statements)

References 9 publications

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“…The post place and route values for 512, 1024 and 2048 bits multipliers implemented in Virtex 2 are presented in Table V and contrasted with [3,4,6,9]. Other relevant results outperformed by the selected one, but not represented in Table V, are in [7,10,11,16,17]. The AxD metrics express computation time by area metric in slices × ms in order to compare the area and performance (less is better).…”

Section: A Modular Multiplicationsmentioning

confidence: 97%

Efficient FPGA Modular Multiplication and Exponentiation Architectures Using Digit Serial Computation

Sutter

Deschamps

Imaña

2010

2010 International Conference on Field Programmable Logic and Applications

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Modular exponentiation with large modulus and exponent has been widely used in public key cryptosystems. Montgomery´s modular multiplication algorithm is normally used since no trial division is necessary and the critical path is reduced by using carry-save addition (CSA). In this paper, the Montgomery multiplication is greatly optimized and architectures are proposed to perform the Least-SignificantBit (LSB) first and the Most-Significant-Bit (MSB) first algorithms. The architecture here presented has the following distinctive characteristics: 1) Use of digit-serial approach for Montgomery multiplication. 2) Conversion of the CSA representation of intermediate multiplication using carry-skip addition which reduces the critical path with a small areaspeed penalty. 3) Precompute quotient value in Montgomeryiteration in order to speed up operation frequency. In this work, implementation results in Xilinx Virtex 5 and Virtex 2 are reported. Experimental results show that the proposed modular exponentiation and modular multiplication design obtains the best delay performance compared with previous published works and outperforms them in terms of area-time complexity.

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Section: A Modular Multiplicationsmentioning

confidence: 97%

Efficient FPGA Modular Multiplication and Exponentiation Architectures Using Digit Serial Computation

Sutter

Deschamps

Imaña

2010

2010 International Conference on Field Programmable Logic and Applications

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“…Implementations of RSA refer to [29], [30]. The best performance implementation of RSA is McIvor's [31].…”

Section: The Application Of Fpga/asic In Cryptographymentioning

confidence: 99%

FPGA/ASIC based Cryptographic Object Store System

Saleh¹,

Debbabi²

2007

Third International Symposium on Information Assurance and Security

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To avoid re-encryption in cryptographic storage system when revoking users, Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) hardware module have been introduced to a cryptographic object store system, let private key never leave the hardware module and symmetric key only exist in hardware module in plaintext. Anyone doesn't know private or symmetric key, so when revoking users, it just needs to modify access control list (ACL) to delete the privileges of the users. To facilitate file sharing and key management, group is adopted. In our system, almost all computationally expensive cryptographic operations are through FPGA/ASIC hardware module. Once creator revokes some users, objects don't need reencryption. How to use ACL and FPGA/ASIC hardware module to authenticate and authorize are described. And the procedure of object store and the distribution of meta-data are detailed. Finally, a cryptographic object store prototype system is implemented with tested and effective performance.

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“…For implementations of RSA on ASIC refer to [25,46] and implementations on FPGA refer to [7,10]. The best performance implementation of RSA is the implementation of McIvor [26].…”

Section: Overview Of Fpga/asicmentioning

confidence: 99%

Integrating FPGA/ASIC into cryptographic storage systems to avoid re-encryption

Chen

Feng

Zhang

et al. 2010

International Journal of Parallel, Emergent and Distributed Sys

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Almost all cryptographic storage systems need re-encryption when revoking users. These systems differ from each other only in the timing of re-encryption. As re-encryption is an expensive operation, it is significant to avoid re-encryption. To avoid re-encryption in cryptographic storage systems, field programmable gate array (FPGA) and application-specific integrated circuit (ASIC) hardware module have been integrated into encrypt-on-disk object store system in this paper, letting private key never leave the hardware module and object key existing only in hardware module in plaintext. Anyone who does not know private or object key, so when revoking users, just needs to modify access control list (ACL) to delete the privileges of the users. To facilitate file sharing and key management, a group is adopted. In the system, almost all computationally expensive cryptographic operations are through FPGA/ASIC hardware module. Once a creator revokes some users, objects do not need re-encryption. How to use ACL and FPGA/ASIC hardware module to authenticate and authorise is also described. And the procedure of object store and the distribution of metadata are detailed. Finally, an encrypt-on-disk object store prototype system is implemented using FPGA in software solution with tested and effective performance.

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Carry-save Montgomery modular exponentiation on reconfigurable hardware

Cited by 25 publications

References 9 publications

Efficient FPGA Modular Multiplication and Exponentiation Architectures Using Digit Serial Computation

Efficient FPGA Modular Multiplication and Exponentiation Architectures Using Digit Serial Computation

FPGA/ASIC based Cryptographic Object Store System

Integrating FPGA/ASIC into cryptographic storage systems to avoid re-encryption

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