Catalyst preparation for CMOS-compatible silicon nanowire synthesis

Abstract

Metallic contamination was key to the discovery of semiconductor nanowires, but today it stands in the way of their adoption by the semiconductor industry. This is because many of the metallic catalysts required for nanowire growth are not compatible with standard CMOS (complementary metal oxide semiconductor) fabrication processes. Nanowire synthesis with those metals which are CMOS compatible, such as aluminium and copper, necessitate temperatures higher than 450 C, which is the maximum temperature allowed in CMOS processing. Here, we demonstrate that the synthesis temperature of silicon nanowires using copper based catalysts is limited by catalyst preparation. We show that the appropriate catalyst can be produced by chemical means at temperatures as low as 400 C. This is achieved by oxidizing the catalyst precursor, contradicting the accepted wisdom that oxygen prevents metal-catalyzed nanowire growth. By simultaneously solving material compatibility and temperature issues, this catalyst synthesis could represent an important step towards real-world applications of semiconductor nanowires.Comment: Supplementary video can be downloaded on Nature Nanotechnology websit

Growth of Crystalline Copper Silicide Nanowires in High Yield within a High Boiling Point Solvent System

“…Similarly, previous reports using Cu as a seed for elemental Si NW formation have always led the formation of orthorhombic Cu 3 Si catalyst seeds from the initial Cu nanoparticles. [36][37][38] It thus seems likely that pure Si NWs would have been formed in this system had Cu 3 Si crystallites been formed on the Cu substrate rather than Cu 15 Si 4 crystallites. Therefore, the phase of silicide (or germanide) formed on the substrate plays an important role in determining whether pure Si (or Ge) NWs or silicide (germanide) NWs form.…”

Hidden defects in silicon nanowires

“…A recent article 43 reports odd HRTEM images on SiNWs in combination with a shifted Raman signal to 503 cm −1 , however only normal diamond cubic silicon is observed in X-ray diffraction (XRD) experiments (see ref 43 and the supporting information). This is a clear indication that Raman spectroscopy is not the appropriate technique to distinguish between the hexagonal phase and the diamond cubic phase with defects because a shifted Raman signal does not necessarily imply the presence of 2H or 9R phases 38,43 . From our point of view Raman spectra with only one associated HRTEM image cannot be a proof of the presence of hexagonal phases.…”

Wafer-level site-controlled growth of silicon nanowires by Cu pattern dewetting

“…This reaction accelerates the formation of Cu silicide and causes more and more silicon dissolution, while some of Cu atoms diffuse into the Si substrate. Once the dissolved Si atoms in the silicide exceed the supersaturation point, SiNWs will grow out from the Cu silicide nucleation sites [32,[34][35][36][37][38]. The SiNWs are amorphous rather than crystalline because of the rapid speed of growth [39].…”

“…3). The absence of Cu may be because of diffusion of Cu atoms into the Si substrate [32,[34][35][36][37][38], and the effect of ion beam irradiation during the fabrication of the TEM sample.…”