CBC2: a microstrip readout ASIC with coincidence logic for trigger primitives at HL-LHC

Braga, D.; Hall, G.; Jones, Laurence; Murray, P. G.; Pesaresi, M.; Prydderch, M.; Raymond, M.

doi:10.1088/1748-0221/7/10/c10003

Cited by 23 publications

(22 citation statements)

References 10 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The function of this logic has been described in detail in previous publications [4]. The logic has been redesigned to provide half-strip resolution, such that even numbered clusters of hit strips are attributed a centre located between the two middle strips, avoiding the introduction of a positional bias, as in the CBC2.…”

Section: Stub Logicmentioning

confidence: 99%

CBC3: a CMS microstrip readout ASIC with logic for track-trigger modules at HL-LHC

Prydderch¹,

Bell²,

Raymond³

et al. 2018

Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP-17)

View full text Add to dashboard Cite

The CBC3 is the latest version of the CMS Binary Chip ASIC for readout of the outer radial region of the upgraded CMS Tracker at HL-LHC. This 254-channel, 130nm CMOS ASIC is designed to be bump-bonded to a substrate to which sensors will be wire-bonded. It will instrument double-layer 2S-modules, consisting of two overlaid silicon microstrip sensors with aligned microstrips. On-chip logic identifies first level trigger primitives from high transversemomentum tracks by selecting correlated hits in the two sensors. Delivered in late 2016, the CBC3 has been under test for several months, including X-ray irradiations and SEU testing. Results and performance are reported.

show abstract

Section: Stub Logicmentioning

confidence: 99%

CBC3: a CMS microstrip readout ASIC with logic for track-trigger modules at HL-LHC

Prydderch¹,

Bell²,

Raymond³

et al. 2018

Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP-17)

View full text Add to dashboard Cite

show abstract

“…In order to fulfil this requirement, the hybrid is built on a four layer polyimide substrate, featuring HDI technology [7]. Seven dummy flip-chips, two active CMS Binary Chip second prototype (CBC2) [8] chips, several passive components and connectors are assembled on the circuit. The PS-MCK assembly requires a fold-over, such as the PS front-end hybrid (figure 4).…”

Section: Ps-mck Hybrid Requirements and Featuresmentioning

confidence: 99%

HDI flexible front-end hybrid prototype for the PS module of the CMS tracker upgrade

Kovacs¹,

Blanchot²,

Gadek³

et al. 2017

J. Inst.

View full text Add to dashboard Cite

The CMS tracker upgrade for the HL-LHC relies on different module types, depending on the position of the respective module. They are built with high-density interconnection flexible circuits that are wire bonded to silicon strip and pixel-strip sensors. The Front-End hybrids will contain several flip-chip bonded readout ASICs that are still under development. Mock-up prototypes are used to qualify the advanced flexible circuit technology and the parameters of the hybrids. This paper presents the Pixel-Strip (PS) mock-up hybrid in terms of testing, interconnection, fold-over, thermal properties and layout feasibility. Plans for circuit testing at operating temperature (-30°C) are also presented. K: Front-end electronics for detector readout; Radiation-hard electronics; Detector design and construction technologies and materials; Manufacturing

show abstract

“…The binary architecture has been chosen to reduce the amount of data that needs to be processed, and to keep the L1 trigger rate of 100 kHz despite the increase in occupancy and the high pileup environment. The CBC is manufactured in 130 nm CMOS technology.With 254 channels the CBC2 [3], an evolved version from the first CBC design, can correlate 127 strips on the upper sensor with 127 strips on the lower sensor of the modules, as illustrated in Figure 1. The chip is foreseen to provide data to the L1 trigger, and once a L1 decision is received, it will send all hit data to the data acquisition system for further event reconstruction.…”

Section: Chip Design Overviewmentioning

confidence: 99%

“…Once the L1 trigger is received, they are loaded to a 32-deep buffer to be read out at 40 Mbps. The second data path passes through a logic block responsible for stub finding and read-out [3].…”

Section: Chip Design Overviewmentioning

confidence: 99%

Test beam results of the first CMS double-sided strip module prototypes using the CBC2 read-out chip

Harb

Mussgiller

Hauk

2017

Nuclear Instruments and Methods in Physics Research Section A:

View full text Add to dashboard Cite

The CMS Binary Chip (CBC) is a prototype version of the front-end read-out ASIC to be used in the silicon strip modules of the CMS outer tracking detector during the high luminosity phase of the LHC. The CBC is produced in 130 nm CMOS technology and bump-bonded to the hybrid of a double layer silicon strip module, the so-called 2S-p T module. It has 254 input channels and is designed to provide on-board trigger information to the first level trigger system of CMS, with the capability of cluster-width discrimination and high-p T track identification. In November 2013 the first 2S-p T module prototypes equipped with the CBC chips were put to test at the DESY-II test beam facility. Data were collected exploiting a beam of positrons with an energy ranging from 2 to 4 GeV. In this paper the test setup and the results are presented. AbstractThe CMS Binary Chip (CBC) is a prototype version of the front-end read-out ASIC to be used in the silicon strip modules of the CMS outer tracking detector during the high luminosity phase of the LHC. The CBC is produced in 130 nm CMOS technology and bump-bonded to the hybrid of a double layer silicon strip module, the so-called 2S-p T module. It has 254 input channels and is designed to provide on-board trigger information to the first level trigger system of CMS, with the capability of cluster-width discrimination and high-p T track identification. In November 2013 the first 2S-p T module prototypes equipped with the CBC chips were put to test at the DESY-II test beam facility. Data were collected exploiting a beam of positrons with an energy ranging from 2 to 4 GeV. In this paper the test setup and the results are presented.

show abstract

CBC2: a microstrip readout ASIC with coincidence logic for trigger primitives at HL-LHC

Cited by 23 publications

References 10 publications

CBC3: a CMS microstrip readout ASIC with logic for track-trigger modules at HL-LHC

CBC3: a CMS microstrip readout ASIC with logic for track-trigger modules at HL-LHC

HDI flexible front-end hybrid prototype for the PS module of the CMS tracker upgrade

Test beam results of the first CMS double-sided strip module prototypes using the CBC2 read-out chip

Contact Info

Product

Resources

About