CDM failure modes in a 130nm ASIC technology

ESD-induced internal core device failure: new failure modes in system-on-chip (SOC) designs

“…This paper presents two major internal core device failure mechanisms observed in SOC designs using a 0.13-µm process technology. The ESD failures did not occur in internal I/O circuits (as reported in [10]), but rather they were observed in the internal core areas not associated with I/O circuits. Two different types of failure mechanisms are reported.…”

“…However, with internal core circuit failure it is more difficult to pinpoint the ESD-induced failure site and fix the design. Since internal core device failure is induced mainly by gate oxide damage, this makes it even more difficult to observe and quantify the ESDinduced failure [8][9][10] The typical electrical failure signature after internal core circuit damage is: i) static I DD current increase in less than a 2 mA current range in general, ii) functional failure, and iii) scan chain breaks. This paper presents two major internal core device failure mechanisms observed in SOC designs using a 0.13-µm process technology.…”

ESD design automation for a 90nm ASIC design system

“…In many of the 130nm ASIC I/Os examined for CDM failures, the damage occurred not on circuits connected to the pad, but on internal nodes powered by the secondary power supply VDDx [7]. In these cases, there is a direct correlation between the voltage set by ESD_LIMIT and the breakdown voltage.…”

“…Failure analysis indicated excessive power supply voltage during the CDM event due to excessive resistance in the I/O power supply net. [7] To prevent this problem in the 90nm ASIC design system, we developed a tool called ALSIM_ESD and a methodology to calculate the total resistance of the ESD discharge path through the power supply for each I/O. …”

ESD protection design for I/O libraries in advanced CMOS technologies

“…However, with internal core circuit failure it is more difficult to find out the ESD-induced failure site and fix the design. Since the internal core device failure is induced mainly by gate oxide damage, this makes it even more difficult to observe and quantify the ESD-induced failure [8,9].…”