2007
DOI: 10.1109/iemt.2007.4417077
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Challenges and Solutions for Cost-effective RF-MEMS Packaging

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Cited by 7 publications
(3 citation statements)
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“…However, these techniques require extensive post-processing, and complicated protection techniques for various parts of the chip at different stages of the fabrication process. Furthermore, the resulting MEMS devices always have exposed moving surfaces, requiring hermetic sealing together with specialized and costly packaging to avoid device performance degradation with time and to shield them from the surrounding environment [4]- [6].…”
mentioning
confidence: 99%
“…However, these techniques require extensive post-processing, and complicated protection techniques for various parts of the chip at different stages of the fabrication process. Furthermore, the resulting MEMS devices always have exposed moving surfaces, requiring hermetic sealing together with specialized and costly packaging to avoid device performance degradation with time and to shield them from the surrounding environment [4]- [6].…”
mentioning
confidence: 99%
“…Flip-chip processing is increasingly used in the wireless industry as the number of I/O's and RF intermodulation/isolation requirements increase [8]. This particular WLP process provides the low profile required..…”
Section: Sem Cross-section Of Mems / Cmos Vias a Thick Pecvd Oxide Layer Was Deposited And Planarized By Cmpmentioning
confidence: 99%
“…Furthermore, it should be preferably fabricated using wafer-level processes to increase the throughput thus decrease the cost. In wafer bonding approaches of wafer-level packaging (WLP), the cost of at least one lid wafer is added to the total production cost [9]. These additional lid wafers can also add more process steps such as wafer grinding or chemical mechanical polishing.…”
Section: Introductionmentioning
confidence: 99%