Challenges in Electron Beam Lithography of Silicon Nanostructures

Çakırlar, Çiğdem; Galderisi, Giulio; Beyer, C. J.; Simon, Maik; Mikolajick, Thomas; Trommer, Jens

doi:10.1109/nano54668.2022.9928629

Cited by 3 publications

(2 citation statements)

References 26 publications

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“…Starting from a 20 nm‐thick silicon‐on‐insulator (SOI) substrate, on top of a 100 nm‐thick buried oxide (BOX), 60 nm‐wide nanochannels were patterned using an electron beam lithography (EBL) process at 16 kV on negative tone 2% hydrogen silsesquioxane (HSQ) resist. [ 40 ] The patterned structures were then developed in tetramethylammonium hydroxide (TMAH) 25% for 20 s and the unwanted silicon areas etched with a reactive ion etching (RIE) process employing a SF 6 , CHF 3 , and O 2 gas mixture. A thinning down sacrificial oxidation was performed at 875 °C for 45 min in order to etch down the silicon to approximately 10 nm thickness.…”

Section: Rfetsmentioning

confidence: 99%

Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors

Galderisi

Beyer

Mikolajick

et al. 2023

Physica Status Solidi (a)

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Three‐gated reconfigurable field‐effect transistors are innovative nanoelectronic devices that are rapidly and increasingly attracting substantial interest in several fields of application thanks to their inherent n/p‐type reconfiguration capabilities. For this reason, it is of significant importance to acquire a deeper knowledge about the temperature ranges in which such devices can be operated and, at the same time, gather a better understanding of the physical mechanisms that are involved in their operation. To achieve this aim, in‐depth observations about the functioning of such devices in an ultrawide temperature range, spanning from 80 to 475 K, are performed and are presented for their ambipolar and low V normalT operation modes. In view of the data exhibited herein, it is possible to assess the performances of three‐gated reconfigurable field‐effect transistors within a considerable temperature span and finally provide significant insights on the temperature‐dependent physical mechanisms regulating their functionality.

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Section: Rfetsmentioning

confidence: 99%

Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors

Galderisi

Beyer

Mikolajick

et al. 2023

Physica Status Solidi (a)

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“…Silicon (Si) nanowires (NWs) are essential building blocks in nanoelectromechanical systems (NEMS) and nanoelectronics. , Because of their compatibility with semiconductor manufacturing, Si NWs bear potential for improving existing technologies or generating new approaches regarding mass spectroscopy, , electromechanical/biochemical sensors, , field effect transistors (FETs), − energy conversion, and harvesting and storage media . The operation of these nanodevices, especially NEMS, relies significantly on their high surface-to-volume ratios leading to remarkable size-dependent mechanical properties. ,− The surface contribution to the overall mechanical behavior increases with decreasing size, thereby resulting in significant size dependence in NW properties. , For example, the quality factor of Si-based nanoresonators is reduced due to surface loss mechanisms such as adsorption, surface stress, surface oxidation/reconstruction, and surface defects. ,, The fracture strength is also shown to be strongly correlated to surface-related defects. , Therefore, a wide range of experimental and computational attempts have been performed to explore Si NW mechanical behavior. ,,− …”

Section: Introductionmentioning

confidence: 99%

Nanomechanical Modeling of the Bending Response of Silicon Nanowires

Zare Pakzad,

Nasr Esfahani,

Tasdemir

et al. 2023

ACS Appl. Nano Mater.

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Understanding the mechanical behavior of silicon nanowires is essential for the implementation of advanced nanoscale devices. Although bending tests are predominantly used for this purpose, their findings should be properly interpreted through modeling. Various modeling approaches tend to ignore parts of the effective parameter set involved in the rather complex bending response. This oversimplification is the main reason behind the spread of the modulus of elasticity and strength data in the literature. Addressing this challenge, a surface-based nanomechanical model is introduced in this study. The proposed model considers two important factors that have so far remained neglected despite their significance: (i) intrinsic stresses composed of the initial residual stress and surface-induced residual stress and (ii) anisotropic implementation of surface stress and elasticity. The modeling study is consolidated with molecular dynamics-based study of the native oxide surface through reactive force fields and a series of nanoscale characterization work through in situ three-point bending test and Raman spectroscopy. The treatment of the test data through a series of models with increasing complexity demonstrates a spread of 85 GPa for the modulus of elasticity and points to the origins of ambiguity regarding silicon nanowire properties, which are some of the most commonly employed nanoscale building blocks. A similar conclusion is reached for strength with variations of up to 3 GPa estimated by the aforementioned nanomechanical models. Precise consideration of the nanowire surface state is thus critical to comprehending the mechanical behavior of silicon nanowires accurately. Overall, this study highlights the need for a multiscale theoretical framework to fully understand the size-dependent mechanical behavior of silicon nanowires, with fortifying effects on the design and reliability assessment of future nanoelectromechanical systems.

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Ultra-compact on-chip silicon photonics isolator using modified genetic algorithm

Ran Chong-Chong,

Wu Ming-Jie,

Zeng Yong-Can

et al. 2025

Acta Phys. Sin.

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The directional optical transmission characteristics of on-chip integrated optical isolators have wide application value in fields such as optical communication and optical signal processing. At early stage, various schemes of on-chip optical isolators have been developed, such as single-crystal magneto-optical pomegranate scheme, and silicon nitride ($\mathrm{Si_3N_4}$) micro-ring resonators. However, there is still lack of compact on-chip optical isolator solutions. Here, we proposed a compact and integrated silicon optical isolator on a standard silicon on insulator (SOI) substrate, designed by intelligent algorithms and a variety of micro-nano circular vias. A modified genetic algorithm is developed and introduce a segmented design fitness function and establishes a gene library to obtain an ultra-compact optical isolator scheme with a size of only $4.2\mathrm{\mu m}\times 3\mathrm{\mu m}$. On a standard silicon on insulator substrate, a linear passive isolation scheme was achieved by etching circular holes with five different diameters such as 60nm, 120nm, 180nm, 240nm and 300nm. In TE polarization mode, the design achieved an isolation degree of approximately 31dB and an insertion loss of approximately 2dB. Furthermore, in TM polarization mode, the design achieved an isolation degree of approximately 38dB and an insertion loss of 2dB; Finally, the impact of different size groups on the performance of isolators was analyzed. Results show that the smaller circular hole structure, the better isolation performance. However, at the same time, we also need to consider the real silicon etching process requirements. Too small holes are difficult to etch in practice. We also evaluated the effect of 10nm, 20nm and 30nm etch penetration between circular vias on the isolator performance, and results tentatively show that the etch penetration caused by the current more mature 30nm etching process is acceptable. Therefore, considering all factors, a 30nm minimum circular hole size and 30nm minimum distance adjacent circular hole spacing are recommended. These results have a promoting effect on the development of highly integrated and ultra-small on-chip optical signal directional transmission schemes.

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Challenges in Electron Beam Lithography of Silicon Nanostructures

Cited by 3 publications

References 26 publications

Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors

Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors

Nanomechanical Modeling of the Bending Response of Silicon Nanowires

Ultra-compact on-chip silicon photonics isolator using modified genetic algorithm

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