Channel-Length-Dependence of Strain Field in Transistor Studied via Scanning Moire Fringe Imaging

Abstract

We have applied scanning moiré fringe (SMF) imaging to the quantitative measurement of the strain introduced in n-type channel transistors with embedded SiC in the source and drain. The tensile strain parallel to the channels was reveal with a nano-meter scale spatial resolution. We investigated the strain field in transistors with various channel lengths scaled down to 25 nm, and found that the strain increases up to 0.7% as the channel length shrinks to 35 nm. However, the strain in the channel decreases to 0. 55% as the channel length is scaled from 35 nm down to 25 nm. Strain engineering is routinely applied in the fabrication of advanced semiconductor devices to enhance the mobility of the carriers in transistors.1,2 The mobility of electrons or holes is boosted when the channel in a transistor is under either a tensile or compressive strain, respectively. The Si 1−x C x embedded in the source/drain region has been used for n-type field effect transistors.3 The lattice parameter of Si 1−x C x with a carbon concentration of about 1% is smaller than that of pure Si. Thus, a compressive stress is formed in the source/drain region, which in turn induces a tensile strain in the n-type channel. 4 Since the electrical performance of the device is greatly influenced by the strain field induced in the channel region, it is required to control the strain field for optimum manufacturing processing. Furthermore, with decrease in the size of modern semiconductor devices, the strain field in the semiconductor devices tends to be strongly influenced by layout design parameters such as the channel length and the geometry of the source and drain regions. 5,6 Therefore, for next-generation technology, it is required to monitor the layout-dependent strain behavior with high precision at nanometer-scale spatial resolutions. Although various tools have been applied to the measurement of strain fields in semiconductor structures, 4,7-17 there have been relatively few experimental results regarding studying the effect of the channel length on the strain field induced in semiconductor device structures. 18In this study, we have applied scanning moiré fringe (SMF) imaging, 19 which is a high-angle annular dark-field scanning transmission electron microscope (HAADF-STEM)-based technique, to quantitatively measure the strain field in transistors with various channel lengths down to 25 nm. SMF imaging is a recently developed method that can measure strain fields at a high spatial resolution in the nanometer scale. [20][21][22] In the HAADF-STEM experiment, the SMFs appear when the scanning grating size d s is close to the crystal lattice spacing d l . Figure 1a shows the strained lattice spacing d l that increases from the bottom to the top of the pattern. Figure 1b Fig. 1c. 22 Because the SMF spacing d SMF changes very sensitively to the variation in the lattice plane spacing d l , the strain field can be obtained by substituting the measured d SMF and a calibrated value of d s in the formula for the width of the translational moiré ...

Direct observation of nanometer-scale strain field around CoSi2/Si interface using scanning moiré fringe imaging

“…8,9 Among the various techniques, a technique using scanning moir e fringe (SMF) by STEM imaging has been recently developed, and it can be used to measure strain fields at nanometer-scale spatial resolutions. [10][11][12][13] The SMFs 14 appear in high-angle annular dark-field STEM (HAADF-STEM) 15 images when the scanning grating size d s is close to integer multiples of the lattice spacing d l of the crystal structure (d s $ nd l : n ¼ 1, 2, 3, ….). Figure 1(a) 10 is an illustration of the SMFs formed by a superposition of a parallel scanning grating (green lines) and strained crystal lattices (black lines).…”

Reproducible strain measurement in electronic devices by applying integer multiple to scanning grating in scanning moiré fringe imaging

“…The motivation for using the relatively low inner-detector angle (45 mrad) was to obtain a reasonable signal-to-noise ratio as discussed in previous works. 8,24 The strain field in the channel region was measured by nanometer-scale scanning moiré fringes (SMF) [6][7][8][9][10][11][12]25 appearing in the HAADF-STEM images. The scanning grating was aligned for interference with the (220) lattice planes of the Si crystal by setting the probe to scan in the [001] direction.…”

“…Among these, the recently developed technique of scanning moiré fringe imaging 6 by scanning-TEM (STEM) is one of the most easily applied to the measurement of strain fields in semiconductor structures and devices. [7][8][9][10][11][12] SMF imaging can be applied to various semiconductor structures and devices: transistors with SiGe or SiC stressors embedded in the source and drain regions for p-or n-type channels, 8,10 strained heterostructures of Si/SiGe, 7,9 or a Si-substrate around a metal silicide contact. 11 Strain fields in semiconductor structures measured by the SMF method have been verified using HR-STEM images in previous studies.…”

Moiré Fringe Method via Scanning Transmission Electron Microscopy

“…Kim et al. applied STEM‐MF to characterize the strain in semiconductor devices, including p‐type channels of transistors with an embedded Si 1− x Ge x source and drain with an 0.1% accuracy, [ 65,66 ] Si/Si 1− x Ge x layer for p‐type metal oxide semiconductor field effect transistors with an 0.1% accuracy, [ 67 ] n‐type channel transistors with embedded SiC with an accuracy of 0.05%, [ 68 ] Si/SiGe/SiGe/SiGe multilayers heterointerface with an accuracy of ≈0.05%, [ 69 ] Si 1− x Ge x ‐channel transistor with an accuracy of ≈0.05%, [ 70 ] and CoSi 2 /Si (111) contact layer interface with an 0.05–0.02% accuracy. [ 71,72 ] It should be noted that a higher accuracy of strain quantification was achieved by averaging over two fringes at the cost of some loss in spatial resolution.…”