We have applied scanning moiré fringe (SMF) imaging to the quantitative measurement of the strain introduced in n-type channel transistors with embedded SiC in the source and drain. The tensile strain parallel to the channels was reveal with a nano-meter scale spatial resolution. We investigated the strain field in transistors with various channel lengths scaled down to 25 nm, and found that the strain increases up to 0.7% as the channel length shrinks to 35 nm. However, the strain in the channel decreases to 0. 55% as the channel length is scaled from 35 nm down to 25 nm. Strain engineering is routinely applied in the fabrication of advanced semiconductor devices to enhance the mobility of the carriers in transistors.1,2 The mobility of electrons or holes is boosted when the channel in a transistor is under either a tensile or compressive strain, respectively. The Si 1−x C x embedded in the source/drain region has been used for n-type field effect transistors.3 The lattice parameter of Si 1−x C x with a carbon concentration of about 1% is smaller than that of pure Si. Thus, a compressive stress is formed in the source/drain region, which in turn induces a tensile strain in the n-type channel. 4 Since the electrical performance of the device is greatly influenced by the strain field induced in the channel region, it is required to control the strain field for optimum manufacturing processing. Furthermore, with decrease in the size of modern semiconductor devices, the strain field in the semiconductor devices tends to be strongly influenced by layout design parameters such as the channel length and the geometry of the source and drain regions. 5,6 Therefore, for next-generation technology, it is required to monitor the layout-dependent strain behavior with high precision at nanometer-scale spatial resolutions. Although various tools have been applied to the measurement of strain fields in semiconductor structures, 4,7-17 there have been relatively few experimental results regarding studying the effect of the channel length on the strain field induced in semiconductor device structures. 18In this study, we have applied scanning moiré fringe (SMF) imaging, 19 which is a high-angle annular dark-field scanning transmission electron microscope (HAADF-STEM)-based technique, to quantitatively measure the strain field in transistors with various channel lengths down to 25 nm. SMF imaging is a recently developed method that can measure strain fields at a high spatial resolution in the nanometer scale. [20][21][22] In the HAADF-STEM experiment, the SMFs appear when the scanning grating size d s is close to the crystal lattice spacing d l . Figure 1a shows the strained lattice spacing d l that increases from the bottom to the top of the pattern. Figure 1b Fig. 1c. 22 Because the SMF spacing d SMF changes very sensitively to the variation in the lattice plane spacing d l , the strain field can be obtained by substituting the measured d SMF and a calibrated value of d s in the formula for the width of the translational moiré ...

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