2016
DOI: 10.1016/j.nima.2016.01.039
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Characterisation of the PXIE Allison-type emittance scanner

Abstract: An Allison-type emittance scanner has been designed for PXIE at FNAL with the goal of providing fast and accurate phase space reconstruction. The device has been modified from previous LBNL/SNS designs to operate in both pulsed and DC modes with the addition of water-cooled front slits. Extensive calibration techniques and error analysis allowed confinement of uncertainty to the <5% level (with known caveats). With a 16-bit, 1 MHz electronics scheme the device is able to analyse a pulse with a resolution of 1 … Show more

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Cited by 9 publications
(12 citation statements)
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“…Typically, Allison scanners are used for characterization of ion beams at energies of tens of keV (e.g. [7], [8]), which is also the case for the PIP2IT LEBT Allison scanner [9]. In the MeV-range, most ion accelerators to date use the so-called double-slit (e.g.…”
Section: Allison Scanner a Working Principlementioning
confidence: 99%
“…Typically, Allison scanners are used for characterization of ion beams at energies of tens of keV (e.g. [7], [8]), which is also the case for the PIP2IT LEBT Allison scanner [9]. In the MeV-range, most ion accelerators to date use the so-called double-slit (e.g.…”
Section: Allison Scanner a Working Principlementioning
confidence: 99%
“…Because of its accuracy and fast measurements, it is usually considered a preferable choice for ion beams at the lower energies typically in range of a few hundreds of kilo electron volts. Like the PIP2IT-LEBT where the Allison scanner [30] is used for a 30 keV Hion beam. To enable its use at 2.1 MeV, front slit plates, made of a molybdenum alloy TZM, are bolted to a stainless-steel water-cooled block with a graphite foil wedged between them.…”
Section: Transverse Beam Emittance Measurementmentioning
confidence: 99%
“…Therefore, to reduce the probability of single event upset in this system, the Verilog HDL (Hardware Description Language) and the design of the peripheral circuit for the FPGA have been continuously modified and optimized. The PXIe connector is used to transmit the FPGA's output data to the NI chassis with transmission speeds that can reach up to 2.5 Gb/s [1,3,14,15,16,17,18,19]. The connection circuit diagram of FPGA and PXIe is presented in Fig.…”
Section: Fpga and Pxie Connection Circuitmentioning
confidence: 99%