Characteristics and mechanisms of subthreshold voltage hysteresis in 4H-SiC MOSFETs*

Chen, Ximing; Shi, Bao‐Sen; Li, Xuan; Fan, Huai-Yun; Chenzhan, Li; Deng, Xiaochuan; Luo, Hailin; Wu, Yudong; Zhang, Bo

doi:10.1088/1674-1056/abd391

Cited by 5 publications

(3 citation statements)

References 17 publications

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“…[6,7] P-shield region under the trench gate is always used to address this issue. [8][9][10][11][12] In this work, a novel SiC trench-type MOSFET with an integrated MOS-channel diode (MCD) is proposed (MT MOS) to realize the reverse conduction. The MCD acts as an FWD and suppresses the body diode turning on.…”

Section: Introductionmentioning

confidence: 99%

High performance SiC trench-type MOSFET with an integrated MOS-channel diode

Wang¹,

Jiang²,

Luo³

et al. 2023

Chinese Phys. B

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A novel SiC double-trench MOSFET with integrated MOS-channel diode is proposed and investigated by Sentaurus TCAD simulation. The new SiC MOSFET has a trench gate and a stepped-trench source, and features an integrated MOS-channel diode on the top sidewall of the source Trench (MT MOS). In the reverse conduction state, the MOS-channel diode turns on firstly to prevent the internal parasitic body diode being activated, and thus reduces the turn-on voltage (V F) and suppresses the bipolar degradation phenomena. The V F of 1.70V (@ I ds = -100 A/cm2) for the SiC MT MOS is 38.2% lower than that of SiC double-trench MOSFET (DT MOS). Meanwhile, the reverse recovery charge Q rr of the MT MOS is 58.7% lower than that of the DT MOS at I load = 700A/cm2, and thus the reverse recovery loss is reduced. Furthermore, owing to the modulation effect induced by the double trenches, the MT MOS preserves same superior forward conduction and blocking performance as those of DT MOS, with 22.9% and 18.2% improvement on BV and R ON,sp than the trench gate MOSFET with planar integrated SBD (ST MOS).

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Section: Introductionmentioning

confidence: 99%

High performance SiC trench-type MOSFET with an integrated MOS-channel diode

Wang¹,

Jiang²,

Luo³

et al. 2023

Chinese Phys. B

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“…4H-SiC MOSFETs are a promising technology for high power electronics [1]. However, silicon dioxide (SiO 2 ) on a Si-face SiC surface still remains a major research topic due to the high defect density compared to the SiO 2 /Si interface [2][3][4][5][6][7][8][9][10][11][12][13]. This is of particular concern because electrically active border and interface defects can not only affect the reliability of the device itself but also the operation of the application circuit [14].…”

Section: Introductionmentioning

confidence: 99%

Oxide and Interface Defect Analysis of lateral 4H-SiC MOSFETs through CV Characterization and TCAD Simulations

Васильев

Feil

Schleich

et al. 2023

MSF

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We investigated oxide and interface defects of lateral 4H-SiC MOSFETs through capacitance-voltage (C-V) and conductance-voltage (G-V) characterization at various frequencies and temperatures. By employing consecutive up and down sweeps of the gate voltage at three different temperatures, we experimentally characterized the hysteresis width as the difference between up and down sweeps in the depletion to accumulation (d-a) and depletion to inversion (d-i) regions. We observed an increase in the hysteresis width with decreasing temperature. Although the hysteresis width is not affected by the small-signal frequency, at the same time, increasing the frequency leads to a strong stretch-out effect, especially in the d-i region.Our measurement results indicate that the hysteresis deformation of the C-V curves is dominated by three different trap types. First, interface acceptor-like defects located close to the conduction band can follow the small-signal frequency. Slower acceptor-like border traps with trap levels both close to the conduction band and in the middle of the band gap are however responsible for the increase of trapped negative charge with increasing gate voltage. Finally, we assume the presence of a fixed positive charge.

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“…Owing to its representative wide band-gap material and device performance, SiC metal-oxide-semiconductor fieldeffect transistor (MOSFET) is widely used in the power systems on account of the properties of low on-state resistance, high power density, outstanding switching characteristics, etc. [1][2][3] To obtain a high efficiency and a low power loss, it is important to increase the reliability of the SiC MOS-FET and reduce the chip size. When the conventional SiC trench MOSFET (C-TMOS) is used in the power systems, a Schottky barrier diode (SBD) must be paralleled to prevent the aged deterioration, [4][5][6][7] which may result in high cost, extra power loss, and undesirable stray inductances.…”

Section: Introductionmentioning

confidence: 99%

A 3D SiC MOSFET with poly-silicon/SiC heterojunction diode

Ran¹,

Huang²,

Hu³

et al. 2022

Chinese Phys. B

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A three-dimensional (3D) silicon-carbide (SiC) trench metal–oxide–semiconductor field-effect transistor (MOSFET) with a heterojunction diode (HJD-TMOS) is proposed and studied in this work. The SiC MOSFET is characterized by an HJD which is partially embedded on one side of the gate. When the device is in the turn-on state, the body parasitic diode can be effectively controlled by the embedded HJD, the switching loss thus decreases for the device. Moreover, a highly-doped P+ layer is encircled the gate oxide on the same side as the HJD and under the gate oxide, which is used to lighten the electric field concentration and improve the reliability of gate oxide layer. Physical mechanism for the HJD-TMOS is analyzed. Comparing with the conventional device with the same level of on-resistance, the breakdown voltage of the HJD-TMOS is improved by 23.4%, and the miller charge and the switching loss decrease by 43.2% and 48.6%, respectively.

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Characteristics and mechanisms of subthreshold voltage hysteresis in 4H-SiC MOSFETs*

Cited by 5 publications

References 17 publications

High performance SiC trench-type MOSFET with an integrated MOS-channel diode

High performance SiC trench-type MOSFET with an integrated MOS-channel diode

Oxide and Interface Defect Analysis of lateral 4H-SiC MOSFETs through CV Characterization and TCAD Simulations

A 3D SiC MOSFET with poly-silicon/SiC heterojunction diode

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