Characteristics of transistors fabricated on silicon-on-quartz prepared using a mechanically initiated exfoliation technique

Shi, Xuejie; Henttinen, Kimmo; Suni, Tommi; Suni, I.; Wong, Man

doi:10.1109/led.2005.853649

Cited by 2 publications

(1 citation statement)

References 14 publications

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“…As traditional methods of scaling CMOS are coming to a dead end, new methods of producing low power high speed transistors are being explored. MOSFETs fabricated on SOI and SOQ substrates demonstrate high mobility and low leakage currents and are beneficial in low power, high-frequency electronics (1,2). Silicon on quartz is particularly attractive in display applications due to the optical transparency of the substrate.…”

Section: Introductionmentioning

confidence: 99%

Strained Si via Plasma Enhanced dTCE Bonding

Sood¹,

Belford²

2006

ECS Trans.

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We present various pre-bonding treatments in conjunction with co-implantation cleaving kinetics en route to producing strained silicon on quartz (SSOQ). This surface activation study presents the ground work for elevated temperature bonding required to obtain strained-Si via differential thermal coefficient of expansion (dTCE) wafer bonding. A novel pre-bonding remote plasma surface activation process is presented. Plasma parameters: exposure time, gas species, etc. are varied. Remote plasma effects are compared with standard RCA surface activation. Cleaving kinetics were investigated using co-implanted wafers of B2+, He+ and P2+ with H+.

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Section: Introductionmentioning

confidence: 99%

Strained Si via Plasma Enhanced dTCE Bonding

Sood¹,

Belford²

2006

ECS Trans.

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Low Stress Silicon Layer Transfer onto Quartz Through Hydrogen Capture within Si (B/Ge) Buried Layer

Huang¹,

Ho²,

Jeng³

et al. 2009

Electrochem. Solid-State Lett.

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An epitaxial single-crystalline Si layer, 715 nm thick, was transferred onto quartz by wafer bonding and diffused-hydrogen ion cutting below 180°C. A sharp interface for trapping hydrogen atoms was created by the epitaxial growth of an undoped silicon layer on top of a boron/germanium-doped silicon layer. An interfacial hydrogen concentration of 1.5 ϫ 10 22 cm −3 was achieved by exposure to an atmospheric-pressure plasma. Following annealing at 180°C and subsequent mechanically induced crack propagation at room temperature, a smooth ͑root-mean-square ϭ 1.14 nm͒, damage-free silicon layer was transferred onto quartz.Silicon-on-quartz ͑SOQ͒ offers state-of-the-art silicon integrated circuit integration onto substrates that are transparent at visible wavelengths and are electrical insulators. However, growing singlecrystalline silicon thin films directly on amorphous transparent substrates for fabricating SOQ is not possible by using conventional deposition techniques. 1 However, single-crystalline silicon thin films on quartz substrates ͑SOQ͒ 2-10 were realized by layer transfer techniques employing a low temperature wafer bonding approach. 2 A hydrogen included layer transfer technique, the so-called ion cut or Smart-Cut, 10 through hydrogen implantation and thermal treatment allows the transfer of a thin film onto a substrate. The thickness of the transferred layer was controlled by the implant energy. In principle, this approach could offer an effective way of making SOQ. However, due to the significant difference in thermal expansion coefficients between silicon ͑3.5 ϫ 10 −6 /°C͒ and quartz ͑5.5 ϫ 10 −7 /°C͒, the thermal stress usually causes fracture or cracking during layer splitting at 400-600°C. 6 One solution for the thermal stress issue in the ion-cut process is to coimplant boron ions and use their remarkable hydrogen-trapping ability to reduce the layer splitting temperature. 11 In this study, we report an approach to transfer a singlecrystalline silicon layer onto a quartz substrate by using an epitaxial silicon buried layer doped with boron/germanium ͑B/Ge͒ as a hydrogen-trapping layer to capture a sufficiently high concentration of hydrogen ions for layer splitting by a plasma hydrogenation process.A 4 in., 525 µm, ͑100͒, p-type silicon wafer was used as the device wafer. Onto this sample, an epitaxial silicon film was grown, 1.75 µm thick and doped with boron and germanium ͑2 ϫ 10 20 /2 ϫ 10 21 cm −3 ͒. Then another undoped epitaxial silicon layer ͑0.7 µm thick͒ was deposited. The B/Ge-doped layer was grown at around 1000-1200°C to assure better incorporation of B and Ge atoms into the Si lattice. In addition, the epitaxial Si layer was deposited below 800°C to prevent remarkable out-diffusion of B and Ge from the doped layer. To compensate for the strain in silicon introduced by a high dose of boron dopants, the germanium was co-doped during epitaxial processing. 12,13 The practical way is to set the boron concentration to 2 ϫ 10 20 cm −3 , and then adjust the Ge concentration ͑close to 2 ϫ 10 21 c...

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Characteristics of transistors fabricated on silicon-on-quartz prepared using a mechanically initiated exfoliation technique

Cited by 2 publications

References 14 publications

Strained Si via Plasma Enhanced dTCE Bonding

Strained Si via Plasma Enhanced dTCE Bonding

Low Stress Silicon Layer Transfer onto Quartz Through Hydrogen Capture within Si (B/Ge) Buried Layer

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