Characterization, Modeling and Test of Synthetic Anti-Ferromagnet Flip Defect in STT-MRAMs

Abstract

Understanding the manufacturing defects in magnetic tunnel junctions (MTJs), which are the data-storing elements in STT-MRAMs, and their resultant faulty behaviors are crucial for developing high-quality test solutions. This paper introduces a new type of MTJ defect: synthetic anti-ferromagnet flip (SAFF) defect, wherein the magnetization in both the hard layer and reference layer of MTJ devices undergoes an unintended flip to the opposite direction. Both magnetic and electrical measurement data of SAFF defect in fabricated MTJ devices is presented; it shows that such a defect reverses the polarity of stray field at the free layer of MTJ, while it has no electrical impact on the single isolated device. The paper also demonstrates that using the conventional fault modeling and test approach fails to appropriately model and test such a defect. Therefore device-aware fault modeling and test approach is used. It first physically models the defect and incorporate it into a Verilog-A MTJ compact model, which is afterwards calibrated with silicon data. The model is thereafter used for fault analysis and modeling within an STT-MRAM array; simulation results show that a SAFF defect may lead to a transient passive neighborhood pattern sensitive fault (tPNPSF) when all neighboring cells are in logic '1' state. Finally, test solutions for such fault are discussed.Index Terms-Device-aware test, STT-MRAMs, manufacturing defects, fault models• Discover a new STT-MRAM-specific defect based on silicon measurements; the defect is referred to as SAFF. • Present magnetic and electrical characterization of MTJ devices with the SAFF defect.

Testing STT-MRAM: Manufacturing Defects, Fault Models, and Test Solutions

“…The root cause can be attributed to the variation of incubation time after the pulse onset, due to thermal fluctuation [202]. We model the switching stochasticity by assigning a normal distribution to t w , which has a fair agreement with measurement data [63,91]. In the thermal activation regime where the pulse width increases above 40 ns, observed in our devices, a small current less than I c is able to flip the magnetization due to the increased thermal fluctuation.…”

“…To address this issue, we propose a device-aware defect modeling approach, which specifically targets MTJ-internal defects [47]. This approach has been applied to pinhole defects [62], synthetic anti-ferromagnet flip (SAFF) defects [63], intermediate (IM) state defects [64]. All of these defects are integrated into a parameterized defective MTJ model, which is calibrated by the measured silicon data at imec.…”

“…To detect it, we propose a hybrid March test incorporating a magnetic write operation (W0 H or W0 H ). To our knowledge, we are the first to introduce magnetic write operations in STT-MRAM testing [63].…”

Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAM

“…For example, 0w1/0/-denotes a w1 operation to a cell containing '0' (S=0w1) fails, the cell remains in its initial value '0' (F =0), and the read output is not applicable (R=−). Using the above FP notation, the entire fault space for singlecell static faults can be defined; it can be easily derived that it consists of 12 FPs [28]. The fault modeling results are shown in Table 3.…”

Hard-to-Detect Fault Analysis in FinFET SRAMs

“…Thus, F ∈ {0,U, 1}. Additionally, a subscript may specify the faulty effect's nature; ' i ' and ' t ' have been used to denote intermittent and transient faults in STT-MRAM devices [30]. We use the subscript ' r ' to denote retention faults [31,32], i.e., the cell's value flips some time (at least longer than the period of one memory operation) after the cell was stressed.…”