Characterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation technique

Abstract

A strained Ge-on-insulator (GOI) structure with a 7-nm-thick Ge layer was fabricated for applications to high-speed transistors. The GOI layer was formed by thermal oxidation of a strained SiGe layer grown epitaxially on a silicon-on-insulator (SOI) wafer. In transmission electron microscopy measurements, the obtained GOI layer exhibited a single-crystal structure with the identical orientation to an original SOI substrate and a smooth Ge/SiO2 interface. The rms of the surface roughness of the GOI layer was evaluated to be 0.4 nm by atomic force microscopy. The residual Si fraction in the GOI layer was estimated to be lower than the detection limit of Raman spectroscopy of 0.5% and also than the electron energy loss spectroscope measurements of 3%. It was found that the obtained GOI layer was compressively strained with a strain of 1.1%, which was estimated by the Raman spectroscopy. Judging from the observed crystal quality and the strain value, this technique is promising for fabrication of high-mobility strained Ge channel of high-performance GOI metal–insulator–semiconductor (MIS) transistors.

Energy band alignment of atomic layer deposited HfO2 oxide film on epitaxial (100)Ge, (110)Ge, and (111)Ge layers

“…[2][3][4][5] Alternative approach is different surface orientations to improve carrier mobility [6][7][8][9] and optimal channel direction for device speed. [10][11][12][13][14] Recently, semiconductor industry was replaced SiO 2 gate oxide by hafnium-based gate dielectric on Si complementary metal oxide semiconductor (CMOS) technology and demonstrated superior microprocessor performance compared to SiO 2 gate oxide. 15 A combination of HfO 2 high-j gate dielectric with high mobility Ge would provide an opportunity for interface engineering and tailoring transistor properties.…”

Structural and band alignment properties of Al2O3 on epitaxial Ge grown on (100), (110), and (111)A GaAs substrates by molecular beam epitaxy

“…[8][9][10] Alternative approaches are different surface orientations to improve the carrier mobility, [11][12][13][14] strain engineering, 11,15,16 device architecture, 8,9,17 and optimal channel direction. [19][20][21][22][23] Research efforts are currently devoted towards investigation of the Ge as channel material, since higher intrinsic carrier mobility of Ge can provide a larger drive current, and its smaller bandgap can enable operation at a lower voltages. In addition, high-j dielectrics on Ge are essential to reduce the gate leakage current for low-power operation.…”

Dynamical Spin Injection into p-Type Germanium at Room Temperature

“…3 A great deal of effort has been undertaken to realize Ge based MOS transistors, including attempts at fabricating high quality Ge on insulators and investigations of metal/Ge contacts. [4][5][6] In addition, Ge-based spintronics have been studied intensively. 7,8 Although demonstrations of spin injection in Ge at RT have been reported by several groups, 9,10 the measurement techniques were limited mainly to the electrical non-local 3-terminal (NL3T) method.…”