Characterization of broad-band transmission for coplanar waveguides on CMOS silicon substrates

Abstract

This paper presents characteristics of microwave transmission in coplanar waveguides (CPW's) on silicon (Si) substrates fabricated through commercial CMOS foundries. Due to the CMOS fabrication, the metal strips of the CPW are encapsulated in thin films of Si dioxide. Many test sets were fabricated with different line dimensions, all on p-type substrates with resistivities in the range from 0.4 1cm to 12.5 1cm. Propagation constant and characteristic impedance measurements were performed at frequencies from 0.1 to 40 GHz, using a vector-network analyzer and the through-reflect-line (TRL) deembeding technique. A quasi-TEM equivalent circuit model was developed from the available process parameters, which accounts for the effects of the electromagnetic fields in the CPW structure over a broad frequency range. The analysis was based on the conformal mapping of the CPW multilayer dielectric cross section to obtain accurate circuit representation for the effects of the transverse fields.

Development of an Equivalent Circuit Model of a Finite Ground Coplanar Waveguide Interconnect in Mis System for Ultra-Broadband Monolithic Ics

“…where t ox is the SiO 2 layer thickness, and ε ox is the dielectric permittivity of SiO 2 [1]. The effective substrate parameters for segments A, B, and C are listed below within in Table 1.…”

“…where C 0 is the partial capacitance of the FGCPW in the absence of the dielectric layers given by Equation (9) [1].…”

“…To this extent, Milanović et al [1] expanded the work related in [12] to include the frequency dependence of the RLGC. R and L are calculated from a technique of "phenomenological equivalent loss method", or PEM [13].…”

“…Moreover, the geometrical parameter estimation is simply not accurate enough. The extracted R(ω) in [1] is much lower than the measured; as a consequence, an additional R l corrective term must be added to match the observation. But the existence of R l requires the presence of longitude electrical field in the silicon substrate that increases with frequency linearly, which in turn contradicts the assumption of Quasi-TEM mode propagation in the silicon substrate.…”

“…Considerable research efforts have been expended to develop methods to rapidly and accurately model and characterize various on-chip interconnects [1][2][3][4][5][6]. For a data rate of 28 Gbps or higher, the interconnect impact becomes even more appreciable and needs to be modeled appropriately.…”