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A major limitation in the fabrication of microstructures as a postCMOS (complimentary metal oxide semiconductor) process has been overcome by the development of a hybrid processing technique, which combines both an isotropic and anisotropic etch step. Using this hybrid technique, microelectromechanical structures with sizes ranging from 0.05 to 1 mm in width and up to 6 mm in length were fabricated in CMOS technology. The mechanical robustness of the microstructures determines the limit on their dimensions. Examples of an application of this hybrid technique to produce microwave coplanar transmission lines are presented. The performance of the micromachined microwave coplanar waveguides meets the design specifications of low loss, high phase velocity, and 50characteristic impedance. Various commonly used etchants were investigated for topside maskless postmicromachining of h100i silicon wafers to obtain the microstructures. The isotropic etchant used is gas-phase xenon difluoride (XeF2), while the wet anisotropic etchants are either ethylenediamine-pyrocatechol (EDP) or tetramethylammonium hydroxide (TMAH). The advantages and disadvantages of these etchants with respect to selectivity, reproducibility, handling, and process compatibility are also described. [258] Index Terms-CMOS microwave elements, isotropic and anisotropic silicon etching, maskless etching, microelectromechanical systems (MEMS), micromachining, suspended transmission lines.

This paper presents characteristics of microwave transmission in coplanar waveguides (CPW's) on silicon (Si) substrates fabricated through commercial CMOS foundries. Due to the CMOS fabrication, the metal strips of the CPW are encapsulated in thin films of Si dioxide. Many test sets were fabricated with different line dimensions, all on p-type substrates with resistivities in the range from 0.4 1cm to 12.5 1cm. Propagation constant and characteristic impedance measurements were performed at frequencies from 0.1 to 40 GHz, using a vector-network analyzer and the through-reflect-line (TRL) deembeding technique. A quasi-TEM equivalent circuit model was developed from the available process parameters, which accounts for the effects of the electromagnetic fields in the CPW structure over a broad frequency range. The analysis was based on the conformal mapping of the CPW multilayer dielectric cross section to obtain accurate circuit representation for the effects of the transverse fields.

Abstract-We have designed, fabricated, and demonstrated large vertical displacement vertical microlens scanners with low ( 10 V) driving voltage using silicon-on-insulator technology. The unique isolated and pre-engaged vertical comb-drive sets and the coupled-torsion flexure design provide both upward and downward piston motions, as well as low driving voltages.Single-directional devices demonstrate maximum static downward displacement of 8 m at 10 dc . Bidirectional devices demonstrate vertical actuation from 6.5 to +9 m at max 12 dc , and a vertical displacement of up to 55 m peak-to-peak is achieved at the resonance near 400 Hz. The lens motion shows piston motion with a small tilt angle of less than 0.034 and the compensation of the tilt using an isolated comb bank is demonstrated.

A microfabrication technology has been developed and demonstrated, which enhances the capabilities and applications of high aspect ratio silicon-on-insulator microelectromechanical systems (SOI-MEMS) by enabling additional independent degrees of freedom of operation: both upward and downward vertical pistoning motion as well as bi-directional rotation. This is accomplished by applying multiple-mask high aspect ratio etches from both the front-and back-side of the SOI device layer, forming beams at different levels. The processes utilize four masks, two for front-side and two for back-side etching. As a result, single-crystal silicon beams with four different cross-sections are fabricated, and can be combined to form many additional beam cross-sections. This provides a wide variety of possible mechanical designs that can be optimized for optical and other applications. By this methodology, unique high aspect ratio micromirror devices were demonstrated with fully isolated and accurately self-aligned vertical combdrives in the SOI device layer, with initial combfinger overlap. Examples of fabricated devices are shown with performance summaries.[886]Index Terms-Deep reactive ion etch (DRIE), inductively coupled plasma (ICP) etch, microfabrication, micromirrors, optical MEMS, self-alignment, SOI-MEMS, vertical combdrives.